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  • 8N1 UART Transceiver Reference Design

    Reference Design

    8N1 UART Transceiver Reference Design

    8-bit data, no parity, and 1 stop bit Universal Asynchronous Receiver/Transmitter (UART) performs serial-to-parallel and parallel to serial conversions on data characters received from a peripheral device or CPU
    iCE40 UltraPlus, MachXO2 
    UART, Bus Controllers, TOR Switch 
    8N1 UART Transceiver Reference Design
  • Generic Soft SPI Master Controller Reference Design

    Reference Design

    Generic Soft SPI Master Controller Reference Design

    Provides an interface between a generic processor with parallel bus interface and external SPI devices.
    MachXO2, MachXO3, LatticeECP3, ECP5 / ECP5-5G, CrossLink, CrossLink-NX, iCE40 UltraPlus 
    SPI, Wishbone, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    Generic Soft SPI Master Controller Reference Design
  • Soft I2C Bus Master

    Reference Design

    Soft I2C Bus Master

    Implements a soft I2C Bus Master in Verilog, supporting many Lattice FPGA families
    CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3, Mach-NX 
    5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
    Soft I2C Bus Master
  • Soft I2C Slave Peripheral

    Reference Design

    Soft I2C Slave Peripheral

    Implements a soft I2C Slave Peripheral in Verilog, supporting many Lattice FPGA families
    CrossLink, CrossLink-NX, CrossLinkPlus, ECP5 / ECP5-5G, iCE40 UltraPlus, LatticeECP3, MachXO2, MachXO3 
    5G, Computing, IoT, TOR Switch, Bus Controllers, I2C 
    Soft I2C Slave Peripheral
  • I2C Bus Master

    Reference Design

    I2C Bus Master

    Demonstrates how a fast and configurable I2C-Bus Master Controller can be constructed and utilized in a Lattice CPLD/FPGA device
    MachXO, LatticeXP2, ispMACH 4000ZE, MachXO2, LatticeECP3, Platform Manager, ECP5 / ECP5-5G, MachXO3 
    Bus Controllers, I2C, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 
    I2C Bus Master
  • I2C Master - WISHBONE Compatible

    Reference Design

    I2C Master - WISHBONE Compatible

    Based on the OpenCores I2C master core, this Reference Design provides a bridge between the I2C and WISHBONE bus
    MachXO, MachXO2, LatticeXP2, LatticeECP3, ECP5 / ECP5-5G, MachXO3 
    I2C, Wishbone, Bus Controllers, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 
    I2C Master - WISHBONE Compatible
  • I2C Master Controller

    Reference Design

    I2C Master Controller

    Implements an I2C Master Controller in Verilog
    iCE40 LP/HX 
    Bus Controllers, I2C, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 
    I2C Master Controller
  • I2C Slave Controller Reference Design

    Reference Design

    I2C Slave Controller Reference Design

    Implements an I2C Slave in Verilog
    iCE40 LP/HX 
    I2C, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets, 5G 
    I2C Slave Controller Reference Design
  • SPI Master Controller

    Reference Design

    SPI Master Controller

    Implements a SPI Master Controller in VHDL and uses an iCE40™ ultra low density FPGA and can be targeted to other iCE40 family members.
    iCE40 LP/HX 
    SPI, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    SPI Master Controller
  • SPI Slave Controller Reference Design

    Reference Design

    SPI Slave Controller Reference Design

    Implements a SPI Slave Controller in VHDL
    iCE40 LP/HX 
    SPI, TOR Switch, Home Control Appliances & Security, IoT & Wearables, Notebooks & PCs, Printers, Smart Toys & Robots, Tablets 
    SPI Slave Controller Reference Design
  • SPI Controller - WISHBONE Compatible

    Reference Design

    SPI Controller - WISHBONE Compatible

    Provides an interface between a microprocessor with a WISHBONE bus and external SPI devices.
    ispMACH 4000ZE, MachXO, LatticeXP2, MachXO2, MachXO3 
    SPI, Wishbone, TOR Switch 
    SPI Controller - WISHBONE Compatible
  • SPI Slave Peripheral using Embedded Function Block

    Reference Design

    SPI Slave Peripheral using Embedded Function Block

    Implements intuitive interface between an external SPI master and the XO2 internal registers (user logic) or memory extension in XO2.
    MachXO2, MachXO3 
    SPI, TOR Switch 
    SPI Slave Peripheral using Embedded Function Block
  • I2C Slave Peripheral using Embedded Function Block

    Reference Design

    I2C Slave Peripheral using Embedded Function Block

    Ready to use RTL code segment that implements intuitive interface between an external I2C master and the MachXO2 internal registers or memory extension in XO2
    MachXO2, MachXO3 
    Bus Controllers, I2C, TOR Switch, Guidance Systems, Smart munitions 
    I2C Slave Peripheral using Embedded Function Block
  • UART 16550 Transceiver

    Reference Design

    UART 16550 Transceiver

    Implements a UART compatible to PC16550 in FPGA.
    iCE40 LP/HX 
    Bus Controllers, UART, TOR Switch 
    UART 16550 Transceiver
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