Lattice Blog

Accelerating Space Development with Low Power, Radiation-Tolerant FPGAs and GRLIB

Accelerating Space Development with Low Power, Radiation-Tolerant FPGAs and GRLIB

Posted 06/09/2022 by Guest blog: Adam Taylor CEng FIET Embedded Systems Consultant

The importance and adoption of FPGA technologies are growing exponentially in space applications thanks to their on-orbit reconfigurability, responsiveness, and flexibility. This is especially true for the latest space application development aimed at Low Earth Orbit (LEO). Operators in LEO typically deploy fleets of satellites to perform applications from ship and asset tracking to weather, environment, and ecosystem monitoring. However, developing applications for space brings challenges ...

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FPGA Design Constraints – Performance and Analysis to Achieve Design and Timing Closure

FPGA design constraints - performance and analysis to achieve design and timing closure

Posted 12/15/2021 by Roger Do, Senior Product Manager, Design Tools, Lattice Semiconductor

Traditionally, FPGA design was simple. Designers set a basic clock constraint that was propagated across the chip. But now, FPGA designs have become much more complex. There are multiple clocks, and relationships between those clocks. There may be clock domain crossings that need to be accounted for. So, FPGA design tools today must feature much greater analysis capabilities to show the designer, for example, where those clock domain crossings are, to be able to constrain for multiple clocks, an...

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Intefacing_with_SPI_Devices_Part_2

Interfacing with SPI Devices, Part 2

Posted 09/23/2021 by Eugen Krassin

This blog post focuses on how to implement a clock domain SPI interface between a DAC and a Lattice FPGA.

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Interfacing with SPI Devices, Part 1

Interfacing with SPI Devices, Part 1

Posted 09/07/2021 by Eugen Krassin

This blog post focuses on how to implement a two clock domain SPI interface between a DAC and a Lattice FPGA.

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The Importance of Timing Constraints in FPGA Designs

The Importance of Timing Constraints in FPGA Designs

Posted 06/07/2021 by Eugen Krassin

This blog post focuses on how to properly specify and validate timing constraints on a Lattice FPGA.

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Lattice Propel

Lattice Propel Opens a World of Possibilities for Software Developers

Posted 02/22/2021 by Roger Do

Do you develop software for embedded systems? Are you interested in using RISC-V processors?

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Introducing Lattice Propel

Introducing Lattice Propel

Posted 06/04/2020 by Roger Do

The Lattice Propel design environment lets hardware and software developers quickly and easily develop Lattice FPGA-based applications in minutes.

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Lattice Radiant Software

Lattice Radiant Software: Full-featured Tool Suite for Edge Designs

Posted 03/06/2018 by Choon-Hoe Yeoh

We recently introduced our next generation FPGA design software: Lattice Radiant software. Embracing our corporate mission of enabling edge connectivity and computing designs, the Radiant software was specifically created for the development of edge applications. It is a full-featured FPGA design tool suite and yet simple to use.

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