MachXO3

Futureproof your control PLD and bridging designs

Related Products

Simplified Control PLD Design and Debug – With multiple I/O banks, a wide range of signaling standards, per-pin programmability and the highest I/O-to-Logic ratio in the industry - Don’t trade off features and functionality. Integrate more capabilities into MachXO3 device family with up to 9400 LUTs and 384 I/O.

Secure and Reliable – Protect your designs from malicious attacks using password protection, and mitigate soft errors through state of the art Soft Error Detection and Soft Error Correction features.

Extended Temperature Flexibility – Realize your next automotive or rugged environmental design with automotive AEC-Q100 qualified XO3LF devices.

Features

  • Up to 9400 LUTs with up to 384 I/O pins
  • Instant-on 1 ms boot-up with background upgrade, Hitless I/O reconfigure and dual-boot error recovery
  • Available with 3.3/2.5 V core or low power 1.2 V core – including additional options on 9400 LUT devices
  • MachXO3LF includes programmable Flash and User Flash Memory (UFM)
  • Available in amazingly small (2.50 x 2.50 mm, 0.4 mm pitch) WLCSP packages and BGA packages with 0.50 mm and 0.80 mm pitch
Automotive

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Family Table

MachXO3 Device Selection Guide
PARAMETERS MachXO3L-640/
MachXO3LF-640		 MachXO3L-1300/
MachXO3LF-1300		 MachXO3L-2100/
MachXO3LF-2100		 MachXO3L-4300/
MachXO3LF-4300		 MachXO3L-6900/
MachXO3LF-6900		 MachXO3L-9400/
MachXO3LF-9400
Density LUTs 640 1300 2100 4300 6900 9400
Distributed RAM (kbits) 5 10 16 34 54 73
EBR SRAM (kbits) 64 64 74 92 240 432
UFM (kbits, MachXO3LF only) 64 64 80 96 256 448
VCC = 2.5 V/3.3 V - Yes
 Yes
 Yes
 Yes
 Yes
VCC = 1.2 V Yes
 Yes
 Yes
 Yes
 Yes
 Yes
Temperature Grades1 C / I / A2 C / I / A2 C / I / A2 C / I / A2 C / I C / I
PLL 1 1 1 2 2 2
I2C 2 2 2 2 2 2
SPI 1 1 1 1 1 1
Timer/Counter 1 1 1 1 1 1
Oscillator 1 1 1 1 1 1
MIPI D-PHY Support Yes Yes Yes Yes Yes Yes
Multi Time Programmable NVCM MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L MachXO3L
Programmable Flash MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF MachXO3LF

1. C = Commercial, I = Industrial, A = Automotive
2. Automotive grade devices available in MachXO3LF only

0.4 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
36-ball WLCSP (2.5 x 2.5 mm)1
28



49-ball WLCSP (3.2 x 3.2 mm)1

38


81-ball WLCSP (3.8 x 3.8 mm)1


63

0.5 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
100-pin TQFP (14 x 14 mm) 794 794 794


121-ball csfBGA (6 x 6 mm)1 100 100 100 100

132-ball csBGA (8 x 8 mm) 1044 1044 1044 1044

256-ball csfBGA (9 x 9 mm)1
206 206 206 206 206
324-ball csfBGA (10 x 10 mm)1

268 268 281
0.8 mm Spacing I/O Count
  640 1300 2100 4300 6900 9400
256-ball caBGA (14 x 14 mm)
2064 2064 2064 2062 2063
324-ball caBGA (15 x 15 mm)

2794 2794 2792
400-ball caBGA (17 x 17 mm)


3352 3352 3353
484-ball caBGA (19 x 19 mm)




3843

1. Package is only available for E=1.2 V devices
2. Package is only available for C=2.5 V/3.3 V devices
3. Package is available for both E=1.2 V and C=2.5/3.3 V devices
4. Package is available in automotive grade (MachXO3LF only)

Example Solutions

Control PLDExpand Image

Control PLD

  • Non-volatile PLD (640 to 9400 LUTs & 28 to 384 I/O) provides widest application coverage in servers, communication boxes and industrial controllers.
  • Reduce cost and BOM by integrating hardware management functions, such as power thermal management and control PLD, into MachXO3 and L-ASC10.
  • Add features and fix bugs in-system without interrupting the system operation through Hitless I/O.
  • Complete board debug faster through on-chip debug using Reveal.
MachXO3 - Motor Control ApplicationExpand Image

Motor Control Interface with MachXO3

  • Flexibility to interface with variety of motors used in Industrial, Automotive and other embedded systems
  • IGBT Protection and SPI interface allows real-time feedback to the MCU
  • Flexibility to support different communication standards at low power and fast response
  • Small footprint to accommodate space constrained applications
MachXO3 - Battery Management SystemExpand Image

Battery Management Control using MachXO3

  • MachXO3 provides controller for the battery management for mobile and portable embedded systems
  • Intelligent cell balancing for charge equalization for each battery cell.
  • Control charge/ discharge process and receive real-time battery information like State of Charge (SOC) and State of Health (SOH)
Interface_expansionExpand Image

Microprocessor Interface Expansion

  • Save cost by adding GPIO to low-cost microcontrollers
  • Add additional SPI and I2C interfaces to system control processors
  • Perform voltage level translation with ease
  • Simplify system management with PLD implementation of system status registers
MIPI CSI2 DiagramExpand Image

CSI-2 Image Sensor Interfacing

  • Supports CSI-2 High Speed Differential Signaling
    • Both Rx and Tx interfaces
  • From 1-4 lanes of CSI-2 at up to 900 Mbps
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • RAW, YUV or RGB supported
MIPI Application DiagramExpand Image

DSI LCD Display Interfacing

  • Supports DSI transmit signaling
    • HS (High Speed) Mode transmit
    • LP (Low Power) Mode transmit and receive
  • Can be implemented in a 49 wlcsp (3.2 x 3.2 mm)
  • Supports DSI formats RGB, YCbCr and User Defined
  • Input bus can also be DSI to enable LCD screen replacement

Videos

Single SCM and Dual HPM LTPI solution
Expand Video

Single SCM and Dual HPM LTPI solution

This demo is designed to support two separate Host Processor Modules (HPMs) with a single Security Control Module (SCM). It supports two independent LVDS Tunneling Protocols and Interfaces (LTPI) over a single SCM CPLD design.
VVDN Thermal Core and Weapon Sight
Expand Video

VVDN Thermal Core and Weapon Sight

The Thermal Core and weapon sight is designed for defense applications, providing intelligent night vision capabilities for tactical forces. It enables thermal weapon sight and identification of weapons while processing at the edge. The Lattice MachXO3™ Family 2100 Cells 65nm Technology 1.2V 49-Pin WLCSP T/R is used to convert parallel (8-bit) video data to MIPI-CSI, playing a crucial role in the overall edge processing.
MachXO3-10K
Expand Video

Control PLD for Embedded System Design

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MachXO3 Family Data Sheet
FPGA-DS-02032 3.4 3/17/2025 PDF 2.5 MB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 9.0 12/16/2025 ZIP 3.2 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
MachXO3 sysCLOCK PLL Design and User Guide
FPGA-TN-02058 1.5 1/25/2022 PDF 2.2 MB
MachXO3 sysI/O User Guide
FPGA-TN-02056 2.0 7/2/2025 PDF 1.1 MB
MachXO3 Programming and Configuration User Guide
FPGA-TN-02055 3.3 8/5/2025 PDF 1.3 MB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-02060 1.2 7/24/2020 PDF 4.3 MB
MachXO3 Soft Error Detection (SED)/Correction (SEC) User Guide
FPGA-TN-02062 1.5 10/21/2024 PDF 553.1 KB
MachXO3 Hardware Checklist
FPGA-TN-02061 1.7 11/5/2025 PDF 682.6 KB
Implementing High-Speed Interfaces with MachXO3 Devices
FPGA-TN-02057 1.3 6/17/2021 PDF 3.4 MB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
Using Hardened Control Functions in MachXO3 Devices
FPGA-TN-02063 1.7 3/19/2025 PDF 1.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
FPGA-TN-02064 2.3 1/5/2026 PDF 1.7 MB
MachXO3 Using Password Security
FPGA-TN-02072 1.2 8/22/2023 PDF 394.5 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.6 12/11/2025 PDF 1.6 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
Power and Thermal Estimation and Management for MachXO3 Devices
FPGA-TN-02059 1.7 5/20/2024 PDF 529.7 KB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
Package Diagrams
FPGA-DS-02053 8.5 8/5/2025 PDF 9.4 MB
MachXO3 324-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 28.7 KB
MachXO3 400-caBGA Package Migration File
1.3 7/27/2016 CSV 35.3 KB
MachXO3-6900 Pinout
1.2 9/22/2014 CSV 28.1 KB
MachXO3-4300 Pinout 400 Ball
1.1 9/22/2014 CSV 20.7 KB
MachXO3 324-Pin caBGA Package Migration File
1.2 3/1/2015 CSV 29 KB
MachXO3 256-Pin csfBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3-2100 Pinout
FPGA-SC-02065 1.3 8/5/2024 CSV 18.1 KB
MachXO3-1300 Pinout
FPGA-SC-02056 1.3 8/5/2024 CSV 8.4 KB
MachXO3-2100 Pinout 324 Ball
1.1 9/22/2014 CSV 17.9 KB
MachXO3-4300 Pinout
FPGA-SC-02066 1.3 8/5/2024 CSV 24.8 KB
MachXO3-1300 Pinout 256 Ball
1.1 9/22/2014 CSV 14 KB
MachXO3-9400 Pinout
1.0 6/6/2016 CSV 28.4 KB
MachXO3-640 Pinout
FPGA-SC-02064 1.2 8/5/2024 CSV 7.9 KB
MachXO3 256-Pin caBGA Package Migration File
1.3 7/27/2016 CSV 37.7 KB
MachXO3 121-Pin csfBGA Package Migration File
1.2 3/1/2015 CSV 14.8 KB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-02263 1.2 12/11/2025 PDF 373 KB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-02341 1.2 6/26/2025 PDF 568.1 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MachXO3 Family Data Sheet
FPGA-DS-02032 3.4 3/17/2025 PDF 2.5 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
MachXO3 sysCLOCK PLL Design and User Guide
FPGA-TN-02058 1.5 1/25/2022 PDF 2.2 MB
MachXO3 sysI/O User Guide
FPGA-TN-02056 2.0 7/2/2025 PDF 1.1 MB
MachXO3 Programming and Configuration User Guide
FPGA-TN-02055 3.3 8/5/2025 PDF 1.3 MB
Memory Usage Guide for MachXO3 Devices
FPGA-TN-02060 1.2 7/24/2020 PDF 4.3 MB
MachXO3 Soft Error Detection (SED)/Correction (SEC) User Guide
FPGA-TN-02062 1.5 10/21/2024 PDF 553.1 KB
MachXO3 Hardware Checklist
FPGA-TN-02061 1.7 11/5/2025 PDF 682.6 KB
Implementing High-Speed Interfaces with MachXO3 Devices
FPGA-TN-02057 1.3 6/17/2021 PDF 3.4 MB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
Using Hardened Control Functions in MachXO3 Devices
FPGA-TN-02063 1.7 3/19/2025 PDF 1.4 MB
Using Hardened Control Functions in MachXO3 Devices Reference Guide
FPGA-TN-02064 2.3 1/5/2026 PDF 1.7 MB
MachXO3 Using Password Security
FPGA-TN-02072 1.2 8/22/2023 PDF 394.5 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.6 12/11/2025 PDF 1.6 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Adding Scalable Power and Thermal Management to MachXO2 and MachXO3 Using L-ASC10
FPGA-AN-02011 1.2 10/11/2019 PDF 2.1 MB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Power Decoupling and Bypass Filtering for Programmable Devices
FPGA-TN-02115 1.1 1/26/2022 PDF 708.9 KB
Power and Thermal Estimation and Management for MachXO3 Devices
FPGA-TN-02059 1.7 5/20/2024 PDF 529.7 KB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-02081 1.1 8/27/2024 PDF 2.6 MB
Single Event Upset (SEU) Report for MachXO2, MachXO3, and MachXO3D
FPGA-TN-02146 1.2 11/30/2023 PDF 261 KB
Temperature Excursion User Guide for MachXO3 and MachXO4 Devices
FPGA-TN-02263 1.2 12/11/2025 PDF 373 KB