The Lattice Semiconductor 10G Ethernet (GbE) IP core supports the ability to transmit and receive data between a host processor and an Ethernet network. The 10GbE IP core consists of the 10-Gigabit Media Independent Interface (XGMII), which connects media access controllers (MACs) and Physical Layer devices (PHYs).
This IP Core is supported in the Lattice Avant™-G, Lattice Avant™-X FPGA for both the MAC, PHY and MAC & PHY combos. For CertusPro™-NX and MachXO5™-NX device families - the MAC, PHY, MAC+PHY, and MAC + PHY + 1588 options are available. These options are available in the Lattice Radiant™ software.
Resource Utilization details are available in the IP Core User Guide.