LatticeECP3 FPGAファミリ

効率性と技術革新との出逢い。コンパクトなSERDES集積FPGA

極めて高効率な性能 ~ 開発に必要な最後の機能部品を、最小限のスペースと最低限のコストで実現可能なことが極めて重要です。しかも、システム性能を直ちに満足する必要があります。できるでしょうか? LatticeECP3があれば大丈夫です。

信頼性を高め、コストと消費電力を低減 ~ 産業用機器または通信インフラストラクチャ機器の信頼性を高め、しかもコストを削減することをお望みですか? SERDESを内蔵し、消費電力が最低0.5W未満のLatticeECP3 FPGAは両方を実現できます。

優れた連携機能のFPGA ~ 適切なプロトコルに対応するSERDES、必要なインターフェイスを持つI/O。LatticeECP3は、システムのコネクティビティと拡張性の全てのニーズを満たします。

特長

  • 3.125 Gbpsで最大16チャネル
  • PCI Express、イーサネット(GbE、XAUI、SGMII)、HDMI、SMPTE、シリアルRapid I/O、CPRI、JESD204A / Bなどをサポートする最大586のプログラム可能なsysIOバッファ
  • 最大150kLUTと6.8MビットのSRAM
  • 以下の消費電力で、小型の10mm x 10mmで広範囲のパッケージを実現

リンクに飛ぶ

ファミリーテーブル

製品名

パラメーター ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
LUT数 (K) 17 33 67 92 149
EBR SRAM規模 (Kbits) 700 1327 4420 4420 6850
EBR SRAMブロック数 38 72 240 240 372
分散RAM規模 (Kbits) 36 68 145 188 303
18x18乗算器数 24 64 128 128 320
3.2Gbps SERDESチャネル数 4 4 12 12 16
最大ユーザI/O数 222 310 490 490 586
PLL + DLL 数 2+2 4+2 10+2 10+2 10+2
パッケージ (I/O + 入力専用)
328-ball csBGA (10 x 10 mm) 2 / 116
256-ball ftBGA (17 x 17 mm) 4 / 133 4 / 133
484-ball fpBGA (23 x 23 mm) 4 / 222 4 / 295 4 / 295 4 / 295
672-ball fpBGA (27 x 27 mm) 4 / 310 8 / 380 8 / 380 8 / 380
1156-ball fpBGA (35 x 35 mm) 12 / 490 12 / 490 16 / 586

ソリューション

デザインに容易に組み込める主要ビルディングブロックが豊富に用意されたLatticeECP3は、フル機能というだけでなく、フル装備になっています。お客様が設計を可能な限り効率的に行う支援となるように、ラティスは以下示す各種アプリケーション分野向けのソリューション開発に注力しています。

ネットワークエッジでの接続性の問題解決

  • イーサネットとカスタムまたはレガシ-・インターフェイス間との低コストなブリッジ構築
  • 無線基地局で一般的なCPRI及びJESD204などのプロトコルとASSPとを容易にブリッジ
  • プロセッサ負荷を軽減することで性能を向上する、ネットワーク・トラフィックのプリプロセッシングの実装
  • DSPを分離することで、ピコ及びフェムトセルで使用されるASSPの機能強化

通信・産業・医療用、及びその他用途の高性能制御プレーン・ソリューションの実装

  • システム内の他の部分との高性能インターフェイスを提供するためのシリアル・インターフェイス
  • 制御プロセッサの負荷を軽減する最適化プリプロセッシング・アルゴリズム

超高速で超並列実装により、画像/ビデオシステムを強化

  • 業界最先端の機能で画像品質を向上
  • 実績あるビデオ解析で、現実世界の問題を容易に解決
  • 一般的なビデオプロトコル用インターフェイスを提供

革新的な車載用ソリューションの構築

  • 画像データ伝送で自動車全体をカバーする、低コストなシリアル・インターフェイスの実装
  • ハードウェア実装を使用した、画像データの効率良い解析
  • 表示スケーリングと回転、及び合成を分離する、プロセッサ負荷の軽減

デザインリソース

IP&リファレンスデザイン

プレテスト、再利用可能な機能を利用して設計の労力を軽減

ソフトウェア

使いやすい設計フローの完全版

開発キット&ボード

当社の開発キットとボードで設計プロセスの合理化

プログラミング ハードウェア

当社のプログラミングハードウェアでインシステム・プログラミング、インサーキット再構成の負担を軽減

ドキュメント

購読もしくは購読の変更をするには、ドキュメント通知でアカウントにログインしてください

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.3 7/20/2021 PDF 4.3 MB
LatticeECP3 Family Data Sheet
FPGA-DS-02074 3.3 3/26/2024 PDF 2.1 MB
Package Diagrams
FPGA-DS-02053 8.3 11/17/2024 PDF 9 MB
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 4/15/2010 CSV 49 KB
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.3 4/15/2010 CSV 49.1 KB
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/13/2009 CSV 49.8 KB
ECP3 migration 35to150_672
1.1 7/9/2009 XLS 87.5 KB
ECP3 migration 17to70_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 70to95_484
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 95to150_672
1.2 9/10/2012 XLS 97.5 KB
ECP3 migration 35to95_484
1.2 9/10/2012 XLS 86 KB
ECP3 migration 35to70_672
1.2 9/10/2012 XLS 96 KB
ECP3 migration 70to150_672
1.2 9/10/2012 XLS 97.5 KB
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.6 1/24/2012 CSV 23.9 KB
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/9/2009 CSV 49.8 KB
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.4 4/15/2010 CSV 29 KB
ECP3 migration 17to35_484
1.2 4/6/2012 XLS 62 KB
ECP3 migration 35to95_672
1.2 9/10/2012 XLS 96.5 KB
ECP3 migration 70to95_672
1.1 7/9/2009 XLS 15 KB
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.5 4/15/2010 CSV 43.8 KB
ECP3 migration 17to95_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 70to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 70to95_1156
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 35to70_484
1.2 9/10/2012 XLS 85.5 KB
ECP3 migration 95to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 17to35_256
1.2 4/6/2012 XLS 68 KB
High-Speed PCB Design Considerations
FPGA-TN-02178 6.4 8/21/2024 PDF 3.5 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.2 9/10/2024 PDF 1.2 MB
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
LatticeECP3 Hardware Checklist
FPGA-TN-02183 2.3 8/27/2024 PDF 695.7 KB
LatticeECP3 High-Speed I/O Interface
FPGA-TN-02184 2.6 6/2/2023 PDF 4.9 MB
LatticeECP3 sysCONFIG Usage Guide
FPGA-TN-02192 3.4 5/1/2024 PDF 1.7 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013 PDF 3.8 MB
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02191 2.7 9/24/2021 PDF 2.3 MB
LatticeECP3 sysIO Usage Guide
FPGA-TN-02194 2.3 3/21/2024 PDF 918.1 KB
LatticeECP3 Power Consumption and Management
FPGA-TN-02189 1.2 5/23/2023 PDF 386.3 KB
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012 PDF 3 MB
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012 PDF 2.7 MB
LatticeECP3 SERDES/PCS Usage Guide
FPGA-TN-02190 3.0 6/4/2024 PDF 3.3 MB
LatticeECP3 sysDSP Usage Guide
FPGA-TN-02193 1.4 3/20/2024 PDF 3.1 MB
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010 PDF 1.5 MB
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010 PDF 1.4 MB
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - FPGA-TN-02190
FPGA-TN-02190 1.2 6/29/2022 ZIP 5.6 KB
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012 PDF 2.9 MB
LatticeECP3 Memory Usage Guide
FPGA-TN-02188 1.9 3/20/2024 PDF 1.8 MB
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012 PDF 3.5 MB
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.9 8/19/2021 PDF 1.3 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015 PDF 2.4 MB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-02196 1.9 8/6/2023 PDF 1.8 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013 RAR 1.4 MB
Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-02202 1.8 7/22/2024 PDF 2.2 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.3 7/20/2021 PDF 4.3 MB
LatticeECP3 Family Data Sheet
FPGA-DS-02074 3.3 3/26/2024 PDF 2.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-02081 1.1 8/27/2024 PDF 2.6 MB
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C 02.8 10/12/2012 PDF 2 MB
High-Speed PCB Design Considerations
FPGA-TN-02178 6.4 8/21/2024 PDF 3.5 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C 06.1 5/23/2011 PDF 434.6 KB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.2 9/10/2024 PDF 1.2 MB
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
LatticeECP3 Hardware Checklist
FPGA-TN-02183 2.3 8/27/2024 PDF 695.7 KB
LatticeECP3 High-Speed I/O Interface
FPGA-TN-02184 2.6 6/2/2023 PDF 4.9 MB
LatticeECP3 sysCONFIG Usage Guide
FPGA-TN-02192 3.4 5/1/2024 PDF 1.7 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013 PDF 3.8 MB
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02191 2.7 9/24/2021 PDF 2.3 MB
LatticeECP3 sysIO Usage Guide
FPGA-TN-02194 2.3 3/21/2024 PDF 918.1 KB
LatticeECP3 Power Consumption and Management
FPGA-TN-02189 1.2 5/23/2023 PDF 386.3 KB
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012 PDF 3 MB
LatticeECP3 SERDES/PCS Usage Guide (Chinese Language Version)
TN1176C 02.4 8/28/2012 PDF 8.7 MB
LatticeECP3 SERDES/PCS Usage Guide (Japanese Language Version)
TN1176J 2.4 8/22/2012 PDF 2.7 MB
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012 PDF 2.7 MB
LatticeECP3 SERDES/PCS Usage Guide
FPGA-TN-02190 3.0 6/4/2024 PDF 3.3 MB
LatticeECP3 sysDSP Usage Guide
FPGA-TN-02193 1.4 3/20/2024 PDF 3.1 MB
LatticeECP3 sysIO Usage Guide (Chinese Language Version)
TN1177C 02.0 6/26/2012 PDF 3.1 MB
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010 PDF 1.5 MB
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010 PDF 1.4 MB
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - FPGA-TN-02190
FPGA-TN-02190 1.2 6/29/2022 ZIP 5.6 KB
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012 PDF 2.9 MB
LatticeECP3 Memory Usage Guide
FPGA-TN-02188 1.9 3/20/2024 PDF 1.8 MB
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012 PDF 3.5 MB
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.9 8/19/2021 PDF 1.3 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077.
AN8077 1.3 3/1/2015 PDF 2.4 MB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Transmission of High-Speed Serial Signals over Common Cable Media
FPGA-TN-02196 1.9 8/6/2023 PDF 1.8 MB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077
AN8077 1.3 1/4/2013 RAR 1.4 MB
Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-02202 1.8 7/22/2024 PDF 2.2 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Package Diagrams
FPGA-DS-02053 8.3 11/17/2024 PDF 9 MB
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 4/15/2010 CSV 49 KB
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.3 4/15/2010 CSV 49.1 KB
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/13/2009 CSV 49.8 KB
ECP3 migration 35to150_672
1.1 7/9/2009 XLS 87.5 KB
ECP3 migration 17to70_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 70to95_484
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 95to150_672
1.2 9/10/2012 XLS 97.5 KB
ECP3 migration 35to95_484
1.2 9/10/2012 XLS 86 KB
ECP3 migration 35to70_672
1.2 9/10/2012 XLS 96 KB
ECP3 migration 70to150_672
1.2 9/10/2012 XLS 97.5 KB
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.6 1/24/2012 CSV 23.9 KB
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.2 7/9/2009 CSV 49.8 KB
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.4 4/15/2010 CSV 29 KB
ECP3 migration 17to35_484
1.2 4/6/2012 XLS 62 KB
ECP3 migration 35to95_672
1.2 9/10/2012 XLS 96.5 KB
ECP3 migration 70to95_672
1.1 7/9/2009 XLS 15 KB
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above.
1.5 4/15/2010 CSV 43.8 KB
ECP3 migration 17to95_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 70to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 70to95_1156
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 35to70_484
1.2 9/10/2012 XLS 85.5 KB
ECP3 migration 95to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 17to35_256
1.2 4/6/2012 XLS 68 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
LatticeECP3 DDR3 Demo for the LatticeECP3 I/O Protocol Board User's Guide
UG38 01.4 6/8/2012 PDF 2.7 MB
LatticeECP3 CPRI Demo Design User's Guide
UG26 01.2 5/3/2012 PDF 2.7 MB
JESD207 IP Core User's Guide
IPUG111 1.0 8/27/2013 PDF 2.4 MB
LatticeECP3 PCI Express Root Complex Lite x1 Native Demo
UG40 1.0 10/29/2010 PDF 263.2 KB
LatticeECP3 Eye/Backplane Demo for the LatticeECP3 Serial I/O Protocol Board User's Guide
UG24 01.4 3/4/2011 PDF 849.9 KB
LatticeECP3 Video Protocol Board - Revision B User's Guide
EB39 1.3 3/2/2010 PDF 2.5 MB
LatticeECP3 AMC Serial RapidIO 2.1 Demo User's Guide
UG39 01.0 11/17/2010 PDF 2.7 MB
LatticeECP3 Serial Protocol Board - Revision D User's Guide
EB44 1.3 7/8/2010 PDF 2.4 MB
LatticeECP3 XAUI Demo
UG23 01.3 6/16/2011 PDF 1.1 MB
LatticeECP3 AMC Evaluation Board User's Guide
EB56 01.1 8/27/2012 PDF 6.6 MB
DDR2 Demo for the LatticeECP3 Serial Protocol Board
Describes the DDR2 Demo for use with the LatticeECP3 Serial Protocol Board.
UG49 5/22/2013 PDF 346 KB
PCIe Sample Demo Debugging and Packet Analysis Guide
TN1271 10/13/2013 PDF 3.7 MB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2
IPUG18 9.2 11/8/2010 PDF 4.6 MB
RapidIO 2.x LP-Serial Physical Layer Endpoint IP Core User's Guide
IPUG84 01.3 6/28/2011 PDF 2.4 MB
Tri-Rate SDI PHY IP Loopback and Passthrough Sample Designs
UG22 1.1 10/30/2009 PDF 222.2 KB
Tri-Rate SMPTE SDI Demo
UG21 01.5 12/21/2011 PDF 1.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
WISHBONE UART - Source Code
RD1042 1.6 12/1/2014 ZIP 58.5 MB
WISHBONE UART - Documentation
FPGA-RD-02137 1.7 2/5/2021 PDF 1.1 MB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-02133 1.6 1/31/2021 PDF 1.2 MB
PCI Target 32-bit/33MHz
FPGA-RD-02134 3.6 1/31/2021 PDF 1.8 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation
FPGA-RD-02132 1.6 8/19/2021 PDF 1.1 MB
RGMII to GMII Bridge Reference Design
FPGA-RD-02136 2.5 6/23/2021 PDF 762.7 KB
RGMII to GMII Bridge - Source Code
FPGA-RD-02136 6/23/2021 ZIP 968.6 KB
PCI/WISHBONE Bridge
FPGA-RD-02135 1.4 2/5/2021 PDF 1.2 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD1184 1.5 1/1/2015 ZIP 2.6 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015 ZIP 1.2 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
FPGA-RD-02131 1.6 1/31/2021 PDF 1.4 MB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD1146 1.4 12/28/2016 ZIP 4.3 MB
MDIO (Management Data Input/Output Interface) Peripheral - WISHBONE Compatible
FPGA-RD-02130 1.2 1/31/2021 PDF 1021 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
PCN 09A-12 Customer Characterization Report
PCN09A-12 1.0 5/14/2012 PDF 551.7 KB
PCN 09A-12 Affected Devices
Assembly Site
PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN 09A-12 Material Set Changes
Assembly Site
PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN03A-14 Characterization Report
PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN06A-14 Affected Device List
PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Material Set Table
PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06A-14 Characterization Report
PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-14 1.0 11/21/2014 PDF 229.5 KB
PCN03A-14 Material Set Table
PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 FAQ
PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Affected Part Number List
PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-14 1.0 11/21/2014 PDF 229.9 KB
PCN05A-11 Notification of Intent to Utilize an Alternate Foundry Process for LatticeECP3
Process
PCN05A-11 1.0 4/11/2011 PDF 207.6 KB
PCN10A-11 Notification of Intent to Freeze ispLEVER After Version 8.2
Conversion
PCN10A-11 1.0 7/25/2011 PDF 52.7 KB
ACN03D-11 Withdrawal of ACN03C-11
Material Set
ANC03D-11 1 4/1/2011 PDF 796.6 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set
PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively
PCN11A-10 1 7/9/2010 PDF 59 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively - Japanese Language
PCN11A-10 1 7/9/2010 PDF 144.1 KB
Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages
5/22/2013 PDF 252.9 KB
PCN03A-13 FAQs
PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03B-13 Affected Part Number and Material Sets
PCN03B-13 6/28/2013 XLSX 69 KB
PCN08A13_AffectedDevices
Other
PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-13 6/28/2013 PDF 202.5 KB
PCN 02A-16 ECP5/ECP5-5G updates on Diamond v3.7
PCN02A-16 1.0 3/1/2016 PDF 162.6 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.2 10/27/2017 PDF 268 KB
PCN05A-17 Affected Parts List
1.0 1/1/0001 XLSX 14.9 KB
PCN03A-13 Device Characterization Report
PCN03A-13 6/28/2013 PDF 981.3 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set
PCN03B 1.0 11/14/2014 PDF 229.6 KB
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-02005 8.3 10/16/2024 ZIP 2.7 MB
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SERCOS III Evaluation Kit Product Brief
I0223 1.0 2/24/2012 PDF 772.8 KB
Wireless Solutions Brochure
I0197 3.0 8/14/2012 PDF 2 MB
New LatticeECP3 Devices - News Brief
NB106 1.0 1/23/2012 PDF 343.5 KB
LatticeECP3 Product Brief (Chinese)
I0198C 7.0 5/29/2012 PDF 3.1 MB
LatticeECP3 Family Product Brochure
I0198 8.0 5/29/2012 PDF 2.7 MB
Lattice HetNet Solutions Brochure
I0234 1.0 11/12/2013 PDF 2.2 MB
Automotive Solutions Product Brief
I0164 8.0 7/2/2013 PDF 2.5 MB
LatticeECP3 Versa Development Kit - News Brief
NB103 2.0 7/5/2012 PDF 364.2 KB
Ethernet Solutions Brochure
I0194 2.0 12/16/2009 PDF 2 MB
LatticeECP3: First PCIe 2.0 Compliant Low Cost FPGA - News Brief
NB104 7/1/2011 PDF 479.5 KB
IP Suites for LatticeECP3 - News Brief
NB101 2/4/2011 PDF 458.8 KB
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FN484_LAE3
Rev G1 6/8/2022 PDF 142.2 KB
FN672_LAE3
Rev H1 6/8/2022 PDF 141.3 KB
MG328_LAE3
Rev Q1 6/21/2022 PDF 142.1 KB
FN1156_FE3
Rev K2 6/8/2022 PDF 150.7 KB
FN672
Rev L1 6/8/2022 PDF 154.1 KB
FN484
Rev K1 6/8/2022 PDF 30.4 KB
MG328_FE3
Rev S1 6/21/2022 PDF 148 KB
FTN256_v2_FE3
Rev Q1 6/9/2022 PDF 154 KB
LatticeEC3 Product Family Qualification Summary
Rev H 4/1/2011 PDF 127.7 KB
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LatticeECP3 PCI Express Development Kit Installation Read Me - Windows
3/9/2011 TXT 0.2 KB
LatticeECP3 PCI Express Development Kit Installation Read Me - Linux
3/9/2011 TXT 0.2 KB
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Gen2 Serial RapidIO and Low Cost Low Power FPGAs (Korean Language)
1.0 9/26/2011 PDF 349 KB
FPGAs in Next Generation Wireless Networks (Korean Language)
1/1/0001 PDF 3.9 MB
FPGAs in Next Generation Wireless Networks (LatticeECP3)
1.0 3/10/2010 PDF 174.7 KB
FPGAs in Next Generation Wireless Networks (Chinese Language)
1/1/0001 PDF 3.5 MB
Embedded Display Control Using FPGAs (Chinese Language)
1.0 6/28/2010 PDF 1.5 MB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block
1.0 2/19/2009 PDF 195.9 KB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block (Chinese Language)
1.0 6/8/2009 PDF 457.9 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs - Chinese Language
1.0 5/22/2013 220.2 KB
FPGAs in Next Generation Wireless Networks (Japanese Language)
1.0 3/10/2010 PDF 284.1 KB
FPGAs in Next Generation Wireless Networks (Traditional Chinese Language)
1.0 1/1/0001 PDF 1.5 MB
Expanding Microprocessor Connectivity Using Low-cost FPGAs
1.0 8/28/2013 PDF 474.4 KB
Designing for Low Power (LatticeECP3)
1.0 3/10/2010 PDF 140.2 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs
1.0 8/4/2011 PDF 276 KB
Power Considerations in FPGA Design (Chinese Language)
1.0 6/8/2009 PDF 814.7 KB
Power WP - Design Example Source Code (LatticeECP3)
1.0 2/17/2009 ZIP 1.4 KB
Power Considerations in FPGA Design (LatticeECP3)
1.0 2/19/2009 PDF 282.1 KB
Implementing DDR3 Memory Controller (LatticeECP3)
1.0 3/10/2010 PDF 147.9 KB
High-Speed SERDES Interfaces In High Value FPGAs (LatticeECP3)
1.0 2/19/2009 PDF 503 KB
Leveraging MIPI D-PHY-based Peripherals in Embedded Designs
1.0 5/1/2014 PDF 567.3 KB