LatticeECP3

高效，适用于创新，采用小尺寸的紧凑型封装

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非常高效的性能——在尽可能小的空间内实现所有功能是至关重要的，拥有150K LUT的LatticeECP3可满足您的需求

最大的可靠性，最低的成本和功耗——LatticeECP3 FPGA带有片上SERDES以及低至0.5W的功耗，助您提高工业、远程通信或车用设备的可靠性并且降低成本

易于互连的FPGA——使用合适协议的SERDES，合适接口的I/O，使用LatticeECP3满足您的系统连接和扩展需求

特性

  • 多达16个通道，速率为3.125 Gbps
  • 800 Mbps DDR3，1Gbps LVDS
  • 多达586个可编程sysIO缓冲器，支持PCI Express、以太网（GbE、XAUI & SGMII）、HDMI、SMPTE、串行Rapid I/O、CPRI和JESD204A/B等等
  • 高达150K LUT以及6.8 Mbit的SRAM
  • 多种封装选择，尺寸小至10.0 mm x 10.0 mm，功耗低至0.5 W以下

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产品系列表

LatticeECP3 器件选型指南

参数 ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
LUT (K) 17 33 67 92 149
EBR SRAM 块 38 72 240 240 372
EBR SRAM (Kbit) 700 1327 4420 4420 6850
分布式RAM (Kbit) 36 68 145 188 303
18 x 18 乘法器 24 64 128 128 320
3.2 Gbps SERDES 通道 4 4 12 12 16
PLL + DLL 2+2 4+2 10+2 10+2 10+2
DDR 支持 DDR3 800, DDR2 533, DDR 400
引导闪存 外部 外部 外部 外部 外部
双引导 有 有 有 有 有
位流加密 有 有 有 有 有
内核电压 1.2 V 1.2 V 1.2 V 1.2 V 1.2 V
Temp C 是 是 是 是 是
Temp I 是 是 是 是 是
Temp AEC-Q100 是 是 - - -
0.5 mm 引脚间距 I/O 数量 / SERDES
  ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm 引脚间距 I/O 数量 / SERDES
  ECP3-17 ECP3-35 ECP3-70 ECP3-95 ECP3-150
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4 295 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4 380 / 8 380 / 8 380 / 8
1156-ball fpBGA (35 x 35 mm) 490 / 12 490 / 12 586 / 16

莱迪思车用（AEC-Q100认证） LatticeECP3 器件选型指南

参数 LA-ECP3-17 LA-ECP3-35
LUT (K) 17 33
EBR SRAM (Kbit) 700 1327
EBR SRAM 块 38 72
分布式RAM (Kbit) 36 68
18 x 18 乘法器 24 64
3.2 Gbps SERDES 通道 4 4
最多可用 I/O 222 310
PLL + DLL 2+2 4+2
0.5 mm 引脚间距 I/O 数量 / SERDES
  LA-ECP3-17 LA-ECP3-35
328-ball csBGA (10 x 10 mm) 116 / 2
1.0 mm 引脚间距 I/O 数量 / SERDES
  LA-ECP3-17 LA-ECP3-35
256-ball ftBGA (17 x 17 mm) 133 / 4 133 / 4
484-ball fpBGA (23 x 23 mm) 222 / 4 295 / 4
672-ball fpBGA (27 x 27 mm) 310 / 4

解决方案实例

LatticeECP3拥有大量现成的设计关键组成模块，可以直接在您的设计中使用，LatticeECP3不仅仅是全功能的——它已经全副武装。为了帮助您尽可能高效地进行设计，莱迪思一直专注于开发适用于各种应用领域的解决方案，例如：

connectivity_solution放大图片

解决网络边缘的连接问题

  • 构建低成本的以太网与定制或传统接口之间的桥接
  • 快速实现ASSP与无线基站中常见协议之间的桥接，包括CPRI和JESD204
  • 实现网络流量的预处理，通过减少处理器的工作量来提高性能
  • 通过分担DSP功能来增强pico和femto-cell中ASSP的性能
control_plane放大图片

实现高性能的控制面板解决方案，适用于通信、工业、医疗和其他应用

  • 使用串行接口提供与系统其他模块之间的高性能接口
  • 通过优化的预处理算法，减轻控制处理器的工作量
massively_parallel_solution放大图片

通过超快、大批量并行的工程实现，增强图片/视频系统性能

  • 使用业界领先的功能，提高图像质量
  • 通过成熟的视频分析功能快速解决现实世界的问题
  • 提供与常用的视频协议之间的接口
automotive_solution放大图片

构建创新的汽车解决方案

  • 实现低成本的串行接口，在整个汽车内部传输图像数据
  • 使用硬件实现，高效地分析图像数据
  • 通过分担显示的缩放、旋转和组合功能，减少处理器的工作量

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

软件

覆盖整个设计流程，非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件，轻松完成在系统编程和在线重配置

文档

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快速参考
技术资源
资讯资源
下载
标题 编号 版本 日期 格式 文件大小
选择全部
Package Diagrams
FPGA-DS-02053 7.3 4/18/2023 PDF 10 MB
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 4/15/2010 CSV 49 KB
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.3 4/15/2010 CSV 49.1 KB
ECP3 migration 17to70_484
1.2 4/6/2012 XLS 67 KB
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 7/13/2009 CSV 49.8 KB
ECP3 migration 35to150_672
1.1 7/9/2009 XLS 87.5 KB
ECP3 migration 95to150_672
1.2 9/10/2012 XLS 97.5 KB
ECP3 migration 70to95_484
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 35to95_484
1.2 9/10/2012 XLS 86 KB
ECP3 migration 35to70_672
1.2 9/10/2012 XLS 96 KB
ECP3 migration 70to150_672
1.2 9/10/2012 XLS 97.5 KB
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.6 1/24/2012 CSV 23.9 KB
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 7/9/2009 CSV 49.8 KB
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.4 4/15/2010 CSV 29 KB
ECP3 migration 17to35_484
1.2 4/6/2012 XLS 62 KB
ECP3 migration 35to95_672
1.2 9/10/2012 XLS 96.5 KB
ECP3 migration 70to95_672
1.1 7/9/2009 XLS 15 KB
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.5 4/15/2010 CSV 43.8 KB
ECP3 migration 17to95_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 17to35_256
1.2 4/6/2012 XLS 68 KB
ECP3 migration 70to95_1156
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 70to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 95to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 35to70_484
1.2 9/10/2012 XLS 85.5 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.3 12/5/2022 PDF 1.2 MB
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.7 12/5/2022 PDF 812.2 KB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077. 		AN8077 1.3 3/1/2015 PDF 2.4 MB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012 PDF 840.1 KB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077 		AN8077 1.3 1/4/2013 RAR 1.4 MB
Advanced Security Encryption Key Programming Guide
FPGA-TN-02202 1.7 2/4/2021 PDF 2.7 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.2 4/24/2023 PDF 1.9 MB
High-Speed PCB Design Considerations
FPGA-TN-02178 6.3 5/31/2022 PDF 1.4 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.1 5/21/2021 PDF 1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
LatticeECP3 Hardware Checklist
TN1189 2.1 2/13/2012 PDF 530.6 KB
LatticeECP3 High-Speed I/O Interface
FPGA-TN-02184 2.5 11/17/2021 PDF 5 MB
LatticeECP3 sysCONFIG Usage Guide
FPGA-TN-02192 3.3 10/26/2021 PDF 1.7 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013 PDF 3.8 MB
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02191 2.7 9/24/2021 PDF 2.3 MB
LatticeECP3 sysIO Usage Guide
TN1177 2.2 8/19/2013 PDF 2 MB
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012 PDF 3 MB
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.9 8/19/2021 PDF 1.3 MB
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012 PDF 2.7 MB
LatticeECP3 sysDSP Usage Guide
TN1182 1.3 2/13/2012 PDF 5.5 MB
LatticeECP3 SERDES/PCS Usage Guide
FPGA-TN-02190 2.9 2/5/2021 PDF 3.7 MB
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010 PDF 1.5 MB
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010 PDF 1.4 MB
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - FPGA-TN-02190 		FPGA-TN-02190 1.2 6/29/2022 ZIP 5.6 KB
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012 PDF 2.9 MB
LatticeECP3 Memory Usage Guide
TN1179 1.8 4/1/2014 PDF 4.6 MB
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012 PDF 3.5 MB
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.3 7/20/2021 PDF 4.3 MB
LatticeECP3 Family Data Sheet
FPGA-DS-02074 3.1 8/17/2021 PDF 5.3 MB
LatticeECP3 Power Consumption and Management
FPGA-TN-02189 1.2 5/23/2023 PDF 386.3 KB
标题 编号 版本 日期 格式 文件大小
选择全部
LA-LatticeECP3 Automotive Family Data Sheet
FPGA-DS-02052 1.3 7/20/2021 PDF 4.3 MB
LatticeECP3 Family Data Sheet
FPGA-DS-02074 3.1 8/17/2021 PDF 5.3 MB
标题 编号 版本 日期 格式 文件大小
选择全部
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.3 12/5/2022 PDF 1.2 MB
Reflow Temperature Guidelines and Moisture Sensitivity
FPGA-TN-02041 4.7 12/5/2022 PDF 812.2 KB
Parallel Flash Programming and FPGA Configuration
Also download the implementation files for AN8077. 		AN8077 1.3 3/1/2015 PDF 2.4 MB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Transmission of High-Speed Serial Signals over Common Cable Media
TN1066 01.8 2/13/2012 PDF 840.1 KB
Parallel Flash Programming and FPGA Configuration - Source Code
For use with Application Note - AN8077 		AN8077 1.3 1/4/2013 RAR 1.4 MB
Advanced Security Encryption Key Programming Guide
FPGA-TN-02202 1.7 2/4/2021 PDF 2.7 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.2 4/24/2023 PDF 1.9 MB
Electrical Recommendations for Lattice SERDES (Chinese Language Version)
TN1114C 02.8 10/12/2012 PDF 2 MB
High-Speed PCB Design Considerations
FPGA-TN-02178 6.3 5/31/2022 PDF 1.4 MB
High-Speed PCB Design Considerations (Chinese Language Version)
TN1033C 06.1 5/23/2011 PDF 434.6 KB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.1 5/21/2021 PDF 1.6 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.2 6/19/2019 PDF 1.7 MB
Low-Cost Serial RapidIO to TI 6482 Digital Signal Processor Interoperability with LatticeECP3
TN1214 1.1 10/18/2010 PDF 176.4 KB
LatticeECP3 Hardware Checklist
TN1189 2.1 2/13/2012 PDF 530.6 KB
LatticeECP3 High-Speed I/O Interface
FPGA-TN-02184 2.5 11/17/2021 PDF 5 MB
LatticeECP3 sysCONFIG Usage Guide
FPGA-TN-02192 3.3 10/26/2021 PDF 1.7 MB
LatticeECP3 and LatticeECP2M High-Speed Backplane Measurements
TN1149 1.5 10/7/2013 PDF 3.8 MB
LatticeECP3 sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02191 2.7 9/24/2021 PDF 2.3 MB
LatticeECP3 sysIO Usage Guide
TN1177 2.2 8/19/2013 PDF 2 MB
LatticeECP3 SERDES/PCS Usage Guide (Chinese Language Version)
TN1176C 02.4 8/28/2012 PDF 8.7 MB
LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability
TN1197 1.1 2/13/2012 PDF 3 MB
LatticeECP3 SERDES/PCS Usage Guide (Japanese Language Version)
TN1176J 2.4 8/22/2012 PDF 2.7 MB
LatticeECP3 Slave SPI Port User Guide
FPGA-TN-02136 1.9 8/19/2021 PDF 1.3 MB
LatticeECP3 Marvell XAUI 10 Gbps Physical Layer Interoperability
TN1194 1.1 2/13/2012 PDF 2.7 MB
LatticeECP3 sysDSP Usage Guide
TN1182 1.3 2/13/2012 PDF 5.5 MB
LatticeECP3 sysIO Usage Guide (Chinese Language Version)
TN1177C 02.0 6/26/2012 PDF 3.1 MB
LatticeECP3 SERDES/PCS Usage Guide
FPGA-TN-02190 2.9 2/5/2021 PDF 3.7 MB
LatticeECP3 and Broadcom 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1217 1.0 7/26/2010 PDF 1.5 MB
LatticeECP3 and Marvell 10 Gbps Physical/MAC Layer Interoperability
TN1219 1.0 7/26/2010 PDF 1.4 MB
LatticeECP3 SERDES/PCS Reset Sequence - Source Code
For use with Technical Note - FPGA-TN-02190 		FPGA-TN-02190 1.2 6/29/2022 ZIP 5.6 KB
LatticeECP3 Marvell 1 GbE (1000BASE-X) Physical/MAC Layer Interoperability
TN1196 1.1 2/13/2012 PDF 2.9 MB
LatticeECP3 Memory Usage Guide
TN1179 1.8 4/1/2014 PDF 4.6 MB
LatticeECP3 and Broadcom 10 Gbps Physical/MAC Layer Interoperability
TN1218 1.1 2/13/2012 PDF 3.5 MB
LatticeECP3 Power Consumption and Management
FPGA-TN-02189 1.2 5/23/2023 PDF 386.3 KB
标题 编号 版本 日期 格式 文件大小
选择全部
Package Diagrams
FPGA-DS-02053 7.3 4/18/2023 PDF 10 MB
LatticeECP3-95EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 4/15/2010 CSV 49 KB
LatticeECP3-70EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.3 4/15/2010 CSV 49.1 KB
ECP3 migration 17to70_484
1.2 4/6/2012 XLS 67 KB
LatticeECP3-70E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 7/13/2009 CSV 49.8 KB
ECP3 migration 35to150_672
1.1 7/9/2009 XLS 87.5 KB
ECP3 migration 95to150_672
1.2 9/10/2012 XLS 97.5 KB
ECP3 migration 70to95_484
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 35to95_484
1.2 9/10/2012 XLS 86 KB
ECP3 migration 35to70_672
1.2 9/10/2012 XLS 96 KB
ECP3 migration 70to150_672
1.2 9/10/2012 XLS 97.5 KB
LatticeECP3-17EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.6 1/24/2012 CSV 23.9 KB
LatticeECP3-95E Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.2 7/9/2009 CSV 49.8 KB
LatticeECP3-35EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.4 4/15/2010 CSV 29 KB
ECP3 migration 17to35_484
1.2 4/6/2012 XLS 62 KB
ECP3 migration 35to95_672
1.2 9/10/2012 XLS 96.5 KB
ECP3 migration 70to95_672
1.1 7/9/2009 XLS 15 KB
LatticeECP3-150EA Pinout
Note: a pin out file can be exported from Diamond version 1.3 or above. 		1.5 4/15/2010 CSV 43.8 KB
ECP3 migration 17to95_484
1.2 4/6/2012 XLS 67 KB
ECP3 migration 17to35_256
1.2 4/6/2012 XLS 68 KB
ECP3 migration 70to95_1156
1.1 7/9/2009 XLS 14.5 KB
ECP3 migration 70to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 95to150_1156
1.2 9/10/2012 XLS 127.5 KB
ECP3 migration 35to70_484
1.2 9/10/2012 XLS 85.5 KB
标题 编号 版本 日期 格式 文件大小
选择全部
PCIe Sample Demo Debugging and Packet Analysis Guide
TN1271 10/13/2013 PDF 3.7 MB
PCI IP Core User's Guide
PCI Core User Guide for LatticeSC, LatticeECP3, LatticeECP2/M, LatticeECP/EC, LatticeXP, Mach XO, and MachXO2 		IPUG18 9.2 11/8/2010 PDF 4.6 MB
DDR2 Demo for the LatticeECP3 Serial Protocol Board
Describes the DDR2 Demo for use with the LatticeECP3 Serial Protocol Board. 		UG49 5/22/2013 PDF 346 KB
LatticeECP3 DDR3 Demo for the LatticeECP3 I/O Protocol Board User's Guide
UG38 01.4 6/8/2012 PDF 2.7 MB
LatticeECP3 CPRI Demo Design User's Guide
UG26 01.2 5/3/2012 PDF 2.7 MB
JESD207 IP Core User's Guide
IPUG111 1.0 8/27/2013 PDF 2.4 MB
LatticeECP3 PCI Express Root Complex Lite x1 Native Demo
UG40 1.0 10/29/2010 PDF 263.2 KB
LatticeECP3 Eye/Backplane Demo for the LatticeECP3 Serial I/O Protocol Board User's Guide
UG24 01.4 3/4/2011 PDF 849.9 KB
LatticeECP3 Video Protocol Board - Revision B User's Guide
EB39 1.3 3/2/2010 PDF 2.5 MB
LatticeECP3 AMC Serial RapidIO 2.1 Demo User's Guide
UG39 01.0 11/17/2010 PDF 2.7 MB
LatticeECP3 Serial Protocol Board - Revision D User's Guide
EB44 1.3 7/8/2010 PDF 2.4 MB
LatticeECP3 XAUI Demo
UG23 01.3 6/16/2011 PDF 1.1 MB
LatticeECP3 AMC Evaluation Board User's Guide
EB56 01.1 8/27/2012 PDF 6.6 MB
RapidIO 2.x LP-Serial Physical Layer Endpoint IP Core User's Guide
IPUG84 01.3 6/28/2011 PDF 2.4 MB
Tri-Rate SDI PHY IP Loopback and Passthrough Sample Designs
UG22 1.1 10/30/2009 PDF 222.2 KB
Tri-Rate SMPTE SDI Demo
UG21 01.5 12/21/2011 PDF 1.1 MB
标题 编号 版本 日期 格式 文件大小
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WISHBONE UART - Source Code
RD1042 1.6 12/1/2014 ZIP 58.5 MB
Parallel to MIPI DSI TX Bridge - Source Code
RD1184 1.5 1/1/2015 ZIP 2.6 MB
Parallel to MIPI CSI-2 TX Bridge - Source Code
RD1183 1.5 1/1/2015 ZIP 1.2 MB
WISHBONE UART - Documentation
FPGA-RD-02137 1.7 2/5/2021 PDF 1.1 MB
MIPI CSI2-to-CMOS Parallel Sensor Bridge - Documentation
FPGA-RD-02131 1.6 1/31/2021 PDF 1.4 MB
MIPI CSI-2-to-CMOS Parallel Sensor Bridge
RD1146 1.4 12/28/2016 ZIP 4.3 MB
MDIO (Management Data Input/Output Interface) Peripheral - WISHBONE Compatible
FPGA-RD-02130 1.2 1/31/2021 PDF 1021 KB
Parallel to MIPI DSI TX Bridge - Documentation
FPGA-RD-02133 1.6 1/31/2021 PDF 1.2 MB
PCI Target 32-bit/33MHz
FPGA-RD-02134 3.6 1/31/2021 PDF 1.8 MB
Parallel to MIPI CSI-2 TX Bridge - Documentation
FPGA-RD-02132 1.6 8/19/2021 PDF 1.1 MB
RGMII to GMII Bridge Reference Design
FPGA-RD-02136 2.5 6/23/2021 PDF 762.7 KB
RGMII to GMII Bridge - Source Code
FPGA-RD-02136 6/23/2021 ZIP 968.6 KB
PCI/WISHBONE Bridge
FPGA-RD-02135 1.4 2/5/2021 PDF 1.2 MB
标题 编号 版本 日期 格式 文件大小
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PCN 09A-12 Customer Characterization Report
PCN09A-12 1.0 5/14/2012 PDF 551.7 KB
PCN 09A-12 Affected Devices
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Alternate Qualified Material Set, Assembly Site for Select Lattice Families
PCN09A-12 1.0 5/14/2012 PDF 160.2 KB
PCN 09A-12 Material Set Changes
Assembly Site 		PCN09A-12 1.0 5/14/2012 XLSX 121 KB
PCN 09A-12 Frequently Asked Questions
PCN09A-12 1.0 5/11/2012 PDF 178.9 KB
PCN03A-14 Characterization Report
PCN03A-14 1.0 4/4/2014 PDF 919.5 KB
PCN06A-14 Affected Device List
PCN06A-14 1.0 10/3/2014 XLSX 45.1 KB
PCN06A-14 Material Set Table
PCN06A-14 1.0 10/3/2014 XLSX 13.7 KB
PCN06A-14 Characterization Report
PCN06A-14 1.0 10/3/2014 PDF 563.7 KB
PCN06B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and Alternate Qualified Material Sets for Select Lattice Products
PCN06B-14 1.0 11/21/2014 PDF 229.5 KB
PCN03A-14 Material Set Table
PCN03A-14 1.0 4/4/2014 XLSX 26.9 KB
PCN03A-14 FAQ
PCN03A-14 1.0 4/4/2014 PDF 452.5 KB
PCN03A-14 Affected Part Number List
PCN03A-14 1.0 4/4/2014 XLSX 60 KB
PCN03B-14 Notification of Intent to Utilize an Alternate Qualified Assembly Site/Test Site and/or Alternate Qualified Material Sets for Select Lattice Products
PCN03B-14 1.0 11/21/2014 PDF 229.9 KB
PCN05A-11 Notification of Intent to Utilize an Alternate Foundry Process for LatticeECP3
Process 		PCN05A-11 1.0 4/11/2011 PDF 207.6 KB
PCN10A-11 Notification of Intent to Freeze ispLEVER After Version 8.2
Conversion 		PCN10A-11 1.0 7/25/2011 PDF 52.7 KB
PCN07C-11 Withdrawal of PCN07B-11
Material Set 		PCN07C-11 1.0 8/1/2011 PDF 917.9 KB
ACN03D-11 Withdrawal of ACN03C-11
Material Set 		ANC03D-11 1 4/1/2011 PDF 796.6 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively
PCN11A-10 1 7/9/2010 PDF 59 KB
PCN11A-10 Notification of Change of Ordering Part Number for the LFE3-70E and LFE3-95E to the LFE3-70EA and LFE3-95EA, Respectively - Japanese Language
PCN11A-10 1 7/9/2010 PDF 144.1 KB
Courtesy Notification of Additional Ejector Pin Sites on Select BGA Packages
5/22/2013 PDF 252.9 KB
PCN03A-13 Device Characterization Report
PCN03A-13 6/28/2013 PDF 981.3 KB
PCN 03B13 Alternate Qualified Assembly Test Site Alternate Qualified Material Sets ASE Taiwan
Assembly Site, Material Set 		PCN03B 1.0 11/14/2014 PDF 229.6 KB
PCN03A-13 FAQs
PCN03A-13 6/28/2013 PDF 458.3 KB
PCN03B-13 Affected Part Number and Material Sets
PCN03B-13 6/28/2013 XLSX 69 KB
PCN08A13_AffectedDevices
Other 		PCN08A-13 1 9/26/2013 XLSX 78.2 KB
PCN03A-13 Alternate Qualified Assembly and Material Sets for Select Devices
PCN03A-13 6/28/2013 PDF 202.5 KB
PCN 02A-16 ECP5/ECP5-5G updates on Diamond v3.7
PCN02A-16 1.0 3/1/2016 PDF 162.6 KB
PCN05A-17 Halogen-Free substrate at ASEM
1.2 10/27/2017 PDF 268 KB
PCN05A-17 Affected Parts List
1.0 1/1/0001 XLSX 14.9 KB
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 7.6 4/27/2023 ZIP 4.5 MB
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SERCOS III Evaluation Kit Product Brief
I0223 1.0 2/24/2012 PDF 772.8 KB
Wireless Solutions Brochure
I0197 3.0 8/14/2012 PDF 2 MB
New LatticeECP3 Devices - News Brief
NB106 1.0 1/23/2012 PDF 343.5 KB
LatticeECP3 Product Brief (Chinese)
I0198C 7.0 5/29/2012 PDF 3.1 MB
LatticeECP3 Family Product Brochure
I0198 8.0 5/29/2012 PDF 2.7 MB
Lattice HetNet Solutions Brochure
I0234 1.0 11/12/2013 PDF 2.2 MB
Automotive Solutions Product Brief
I0164 8.0 7/2/2013 PDF 2.5 MB
LatticeECP3 Versa Development Kit - News Brief
NB103 2.0 7/5/2012 PDF 364.2 KB
Automotive Solutions Product Brief (Chinese)
I0164hc 8.0 8/7/2013 PDF 2.5 MB
Ethernet Solutions Brochure
I0194 2.0 12/16/2009 PDF 2 MB
LatticeECP3: First PCIe 2.0 Compliant Low Cost FPGA - News Brief
NB104 7/1/2011 PDF 479.5 KB
IP Suites for LatticeECP3 - News Brief
NB101 2/4/2011 PDF 458.8 KB
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FN672_LAE3
Rev H1 6/8/2022 PDF 141.3 KB
FN484_LAE3
Rev G1 6/8/2022 PDF 142.2 KB
MG328_LAE3
Rev Q1 6/21/2022 PDF 142.1 KB
FN1156_FE3
Rev K2 6/8/2022 PDF 150.7 KB
FN672
Rev L1 6/8/2022 PDF 154.1 KB
MG328_FE3
Rev S1 6/21/2022 PDF 148 KB
FN484
Rev K1 6/8/2022 PDF 30.4 KB
FTN256_v2_FE3
Rev Q1 6/9/2022 PDF 154 KB
LatticeEC3 Product Family Qualification Summary
Rev H 4/1/2011 PDF 127.7 KB
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LatticeECP3 PCI Express Development Kit Installation Read Me - Windows
3/9/2011 TXT 0.2 KB
LatticeECP3 PCI Express Development Kit Installation Read Me - Linux
3/9/2011 TXT 0.2 KB
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Gen2 Serial RapidIO and Low Cost Low Power FPGAs (Korean Language)
1.0 9/26/2011 PDF 349 KB
FPGAs in Next Generation Wireless Networks (Korean Language)
1/1/0001 PDF 3.9 MB
FPGAs in Next Generation Wireless Networks (LatticeECP3)
1.0 3/10/2010 PDF 174.7 KB
FPGAs in Next Generation Wireless Networks (Chinese Language)
1/1/0001 PDF 3.5 MB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block
1.0 2/19/2009 PDF 195.9 KB
Embedded Display Control Using FPGAs (Chinese Language)
1.0 6/28/2010 PDF 1.5 MB
Embedded Signal Processing Capabilities of the LatticeECP3 sysDSP Block (Chinese Language)
1.0 6/8/2009 PDF 457.9 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs - Chinese Language
1.0 5/22/2013 220.2 KB
Designing for Low Power (LatticeECP3)
1.0 3/10/2010 PDF 140.2 KB
FPGAs in Next Generation Wireless Networks (Traditional Chinese Language)
1.0 1/1/0001 PDF 1.5 MB
FPGAs in Next Generation Wireless Networks (Japanese Language)
1.0 3/10/2010 PDF 284.1 KB
Expanding Microprocessor Connectivity Using Low-cost FPGAs (Chinese)
1.0 8/28/2013 PDF 660.7 KB
GEN2 Serial RapidIO and Low Cost, Low Power FPGAs
1.0 8/4/2011 PDF 276 KB
Power Considerations in FPGA Design (Chinese Language)
1.0 6/8/2009 PDF 814.7 KB
Power WP - Design Example Source Code (LatticeECP3)
1.0 2/17/2009 ZIP 1.4 KB
Power Considerations in FPGA Design (LatticeECP3)