CrossLink-NX: エンベデッドビジョン&プロセッシングFPGA

MIPI ブリッジ & エッジ AI の組み合わせを実現

ラティス・ネクサス・プラットフォーム – 同クラスのFPGAと比較して最大 75% 低消費電力、4 mm x 4 mm の小型パッケージサイズ

画像処理アプリケーションのためのクラス最高性能を提供 – ロジック当たり最大の内蔵メモリ量、最大 1 ロジックセル当たり 170 ビット、AI 推論に最適

高速インタフェース – 2.5 Gbps ハードウェア MIPI D-PHY、5 Gbps PCIe、1.5 Gbps プログラマブル IO、1066 Mbps DDR3。LVDS、subLVDS、OpenLDI (OLDI)、SGMII、FPGA ファブリックは多重・複製・分岐を実現

機能

  • 高速起動 (インスタントオン) – 3 ms で IO を起動、8 ms でデバイスを起動
  • プログラム可能な FD-SOI バックバイアスがデバイス毎にパフォーマンスと電力の最適化
  • ハードウェア MIPI D-PHY (4レーン) トランシーバを2つ実装、1つの PHY で 10 Gbps
  • カメラ、ディスプレイインタフェース用に最大 37 プログラマブル・ソースシンクロナス I/O ペア
  • 4 mm x 4 mm WLCS パッケージ (0.4 mm ピッチ) から 17 mm x 17 mm BGA パッケージ (0.8 mm ピッチ)
  • クラス最小のソフトエラーレート、競合と比較して 100 倍上回る信頼性

各項目へのリンク

ファミリーテーブル

CrossLink-NX デバイス セレクション ガイド
機能 LIFCL-17 LIFCL-40
ロジックセル 17K 39K
エンベデッドメモリ (EBR) Bits (Kb) 432 1512
ラージメモリ (LRAM) Bits (Kb) 2560 1024
18 x 18 乗算器 24 56
ADC ブロック 2 2
GPLL 2 3
HW 10 Gbps D-PHY クアッド 2 2
HW 2.5 Gbps D-PHY データレーン (合計) 8 8
5 Gb/s PCIe Gen2 ハード IP 1
0.4 mm Total I/O (D-PHY, PCIe, ワイドレンジ, ハイパフォーマンス)

LIFCL-17 LIFCL-40
72 wlcsp (3.7 x 4.1 mm) 40 (1, 0, 16, 24)
0.5 mm Total I/O (D-PHY, PCIe, ワイドレンジ, ハイパフォーマンス)

LIFCL-17 LIFCL-40
72 QFN (10 x 10 mm) 40 (1, 0, 18, 22) 40 (1, 0, 18, 22)
121 csfBGA (6 x 6 mm) 72 (2, 0, 24, 48) 72 (2, 0, 24, 48)
289 csfBGA (9.5 x 9.5 mm) 180 (2, 1, 106, 74)
0.8 mm Total I/O (D-PHY, PCIe, ワイドレンジ, ハイパフォーマンス)

LIFCL-17 LIFCL-40
256 caBGA (14 x 14 mm) 78 (2, 0, 30, 48) 163 (2, 1, 89, 74)
400 caBGA (17 x 17 mm) 192 (2, 1, 118, 74)

ソリューション

USB to Peripheral Interface Bridging

  • Create plug n play peripheral expansion on USB-enabled FPGA
  • Signal protocol conversion from USB 2.0 to I2C, SPI, and GPIO
  • Signal aggregation and de-aggregation over USB 2.0

Sensor Bridging Over USB

  • Bridge MIPI CSI-2 image sensor to USB interface
  • Signal protocol conversion from MIPI CSI-2 to USB
  • Uncompressed sensor bandwidth up to USB 3.2 Gen 1 (5 Gbps)

エッジ AI コンパニオン

  • 1 つまたは複数の CSI-2 イメージセンサーをプロセッサインタフェース (PCIe、CMOS、CSI-2) に変換
  • プロセッシング用に最大 3 Mbit の内蔵RAM
  • 物体検知や物体カウントのための CPU 処理をオフロード
  • シングルデバイスによる複数画像入力の結合とエッジ AI 処理を実現

センサ・アグリゲーション

  • 最大 11 の MIPI CSI-2 イメージセンサ入力を 1 つの MIPI CSI-2 出力
  • データを結合し水平方向拡張したビデオを生成
  • 外部 DDR メモリを用いてデータを結合し垂直方向に拡張したビデオを生成
  • 個別のバーチャル・チャネルを用いてイメージセンサからのデータを多重
  • 限定されたプロセッサのセンサインタフェース(機能・数)を拡張

イメージセンサ・プロセッシング

  • 1つまたは複数の CSI-2 イメージセンサーをプロセッサインタフェースに変換(PCIe、CMOS、CSI-2)
  • フル機能のビデオ処理を統合
  • 例: DeBayer、Color Correction Matrix、RGB Gain、Gamma Correction、その他
  • プロセッサから ISP 機能を軽減

信号の分岐と複製

  • CSI-2 / DSI 入力信号を分岐・複製し複数のビデオを出力(最大 14 )
  • 安全性を重要とするアプリケーションのセンサーデータに冗長性を提供
  • つの入力を複数のディスプレイ出力が必要とするアプリケーションを簡素化

Videos

AIZip Ultra-Efficient Speaker Identification Model on Lattice CrossLink™-NX-33

AIZip Ultra-Efficient Speaker Identification Model on Lattice CrossLink™-NX-33

This demo showcases a robust speaker identification model developed and deployed by Aizip Inc. The efficient neural network-based model can register multiple speakers and provide accurate, low-latency identification results. Co-designed to leverage the superior capabilities of the Lattice CrossLink™-NX-33 board, it features an optimized hardware accelerator to support model computations.
Arrow & Citrobits Cross-Platform Vision AI Workloads Enabled by Lattice CrossLinkU™-NX

Arrow & Citrobits Cross-Platform Vision AI Workloads Enabled by Lattice CrossLinkU™-NX

The Lattice CrossLinkU™-NX FPGA implements the USB Video Device Class (UVC) standard, allowing you to directly connect a MIPI-based camera module to various application processors, like the NVIDIA Jetson, Qualcomm QCS6490, and NXP i.MX9x. This is made possible by the Citrobits CrossLinkU-NX-based CBM110 USB bridge/aggregator module, which acts as a bridge between the MIPI camera module and the USB interface. The UVC standard simplifies the process of integrating the camera with the host processor.
Helion GmbH Smart Home Video Surveillance

Helion GmbH Smart Home Video Surveillance

This demo features a smart, low-power home video surveillance system based on the Lattice CrossLink™-NX 40 platform. It delivers 1080p30 video with less than 1.5W power consumption for the entire camera. The ispChain used in this demo will be available for customer use across all Lattice Nexus™ and Lattice Avant™ devices.
Industrial HMI

Industrial HMI

This demo showcases industrial human-machine interface (HMI) with advanced operated attention sensing and identification. Seamlessly connect with your machinery, gaining real-time insights and control.
Lattice CrosslinkU-NX USB3 Vision (U3V) Reference Design

Lattice CrosslinkU-NX USB3 Vision (U3V) Reference Design

The USB3 Vision Reference Design with Lattice CrosslinkU-NX device enables video streaming solution from external image sensor to host through MIPI <-> USB3. This solution is in compliance with USB3 Vision standard V1.2 which is widely applicable in Industrial and IOT segment. U3V RD provides methods for camera control, triggering, synchronization through software integration that follows GenICam standard.
Lumotive Beam Steering Chip-Based Lidar

Lumotive Beam Steering Chip-Based Lidar

This demonstration showcases Light Surface Metamaterial (LCM) technology for advanced beam steering. Similar to developing a camera module, it features software-defined ROI capabilities for Virtual lidars. This cutting-edge technology offers extended range, higher FPS, and enhanced resolution, all dynamically driven by object detection or perception layers.
SLS MIPI Cameras to USB3 Bridging Using USB Video Class & RAW Data Transfer over USB3

SLS MIPI Cameras to USB3 Bridging Using USB Video Class & RAW Data Transfer over USB3

Dual MIPI D-PHY CSI-2 to USB3 Video Class Bridge on Lattice CrossLink™-NX: Seamlessly convert MIPI streams to USB3 with our cutting-edge FPGA design. This solution leverages the OS’s built-in USB Video Class driver, eliminating the need for USB driver development.Real-Time USB3 Throughput Measurement Using Lattice CrossLinkU™-NX: This demonstration accurately assesses data transfer speeds to ensure optimal performance. The Lattice CrossLinkU-NX platform provides a robust and reliable environment for capturing high-speed data.
TinyVision.ai  Object Detection/Tracking on CrosslinkU-NX33: StreamLogic

TinyVision.ai Object Detection/Tracking on CrosslinkU-NX33: StreamLogic

This demonstration showcases Object Detection/Tracking on CrosslinkU-NX33 with StreamLogic, utilizing the TinyVision tinyCLUNX33 SoM and a no-code GUI with RTL generation. Features include an ISP supporting 1920x1080 at 30 fps, advanced image processing, and accelerated object detection based on edge detection.
TinyVision.ai tinyCLUNX33 SoM Lattice CrossLinkU-NX33​

TinyVision.ai tinyCLUNX33 SoM Lattice CrossLinkU™-NX33

The tinyCLUNX33 SoM featuring the Lattice CrossLinkU-NX33 is a highly integrated, production-friendly System on Module designed for rapid prototyping with a clear path to production.
CrossLink-NX

Introducing CrossLink-NX

CrossLink-NX FPGA is the first family of FPGAs implemented on the new Lattice Nexus Platform. CrossLink-NX provides the energy efficiency, small form factor, high reliability and higher performance developers need to enable innovative embedded vision solutions for the Edge.
CrossLink-NX: Power Efficiency Demo

CrossLink-NX: Power Efficiency Demo

This demonstration measures the power consumption of Lattice’s CrossLink-NX FPGAs relative to other similar FPGAs using commercially available boards.
CrossLink-NX: Instant On Demo

CrossLink-NX: Instant On Demo

This demonstration measures the IO wakeup time of Lattice’s CrossLink-NX FPGAs relative to other similar FPGAs using commercially available development boards.
CrossLink-NX: Embedded Vision Demo

CrossLink-NX: Embedded Vision Demo

This demonstration shows a development board equipped with a CrossLink-NX FPGA, based on the Lattice Nexus platform. The FPGA has been programmed to perform camera aggregation, which is a common embedded vision use case found in many applications.
CrossLink-NX: Human Presence Demo

CrossLink-NX: Human Presence Demo

This demonstration shows a development board equipped with a CrossLink-NX FPGA, based on the Lattice Nexus platform. The FPGA has been programmed to perform human presence detection and counting, which is a common AI use case found in many applications.

Awards

Electroniques 2021 Electrons D'or Awards

Digital IC

Business Intelligence AI Excellence Award

2021 Finalist

The Electronics Industry Awards 2020

Embedded Solution Product of the Year

Leadership in Engineering Achievement Program (LEAP) Awards 2020

Bronze Medal- Embedded Computing Category

2020 Electronics Maker Best of Industry Awards

Best FPGA Award (Technology & Product Innovation category)

Design Resources

開発キット&ボード

当社の開発キットとボードで設計プロセスの合理化

IP & リファレンスデザイン

事前検証済み、開発期間を短縮

開発ソフトウェア

使いやすく、開発に必要な機能を提供

資料

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.6 12/10/2024 PDF 560.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Thermal Management
FPGA-TN-02044 5.4 12/10/2024 PDF 1018.3 KB
Using TraceID
FPGA-TN-02084 2.7 12/10/2024 PDF 408 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
CrossLink-NX-33 and CrossLinkU-NX Data Sheet
FPGA-DS-02104 1.00 8/8/2024 PDF 1.9 MB
CrossLink-NX Family Data Sheet
FPGA-DS-02049 2.2 1/21/2025 PDF 3.9 MB
Package Diagrams
FPGA-DS-02053 8.4 12/11/2024 PDF 9 MB
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
CrossLink-NX caBGA256 Pin Migration Table
FPGA-SC-02014 1.0 10/27/2020 CSV 16.5 KB
CrossLink-NX QFN72 Pin Migration Table
FPGA-SC-02015 1.1 5/25/2022 CSV 5.6 KB
CrossLink-NX csfBGA121 Pin Migration Table
FPGA-SC-02016 1.0 10/27/2020 CSV 9.2 KB
CrossLink-NX LIFCL-33-Pinout
FPGA-SC-02040 0.80 8/31/2023 CSV 3.5 KB
CrossLink-NX LIFCL-17 Pinout
FPGA-SC-02006 0.92 10/26/2020 CSV 10.6 KB
CrossLink-NX LIFCL-40 Pinout
FPGA-SC-02018 1.21 12/28/2020 CSV 35.5 KB
CrossLink-NX LIFCL-33U-Pinout
FPGA-SC-02050 0.7 9/26/2023 CSV 4.3 KB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.6 3/19/2024 PDF 1.8 MB
CrossLink-NX High-Speed I/O Interface
FPGA-TN-02097 1.9 4/4/2024 PDF 2.8 MB
CrossLink-NX Hardened D-PHY Usage Guide
FPGA-TN-02081 1.1 6/21/2021 PDF 1.2 MB
Triple-Speed Ethernet MAC Driver API Reference
FPGA-TN-02341 1.1 7/29/2024 PDF 398.2 KB
Power Management and Calculation for CrossLink-NX Devices
FPGA-TN-02075 1.3 7/15/2021 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.5 8/1/2024 PDF 1.8 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.7 6/26/2024 PDF 1.3 MB
CrossLink-NX-33 and CrossLinkU-NX High-Speed I/O Interface
FPGA-TN-02280 0.85 9/1/2024 PDF 1.4 MB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.5 1/16/2025 PDF 1.8 MB
CrossLink-NX-33 and CrossLinkU-NX Hardware Checklist
FPGA-TN-02308 1.3 8/27/2024 PDF 969 KB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.8 11/6/2024 PDF 1.1 MB
CrossLink-NX Hardware Checklist
FPGA-TN-02149 1.6 6/30/2024 PDF 684.9 KB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.1 7/18/2024 PDF 614.6 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.2 1/7/2025 PDF 1.4 MB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.6 8/1/2024 PDF 368 KB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.5 2/5/2025 PDF 679.4 KB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 3.3 2/5/2025 PDF 3.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
CrossLink-NX-33 and CrossLinkU-NX Data Sheet
FPGA-DS-02104 1.00 8/8/2024 PDF 1.9 MB
CrossLink-NX Family Data Sheet
FPGA-DS-02049 2.2 1/21/2025 PDF 3.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Advanced Configuration Security Usage Guide for Nexus Platform
This document would be provided through Technical Support Request after sign-in to Lattice web site. Please refer to Answer Database FAQ 6848 for detail instruction
FPGA-TN-02176 1.9 8/27/2024 WEB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.6 12/10/2024 PDF 560.4 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.0 12/10/2024 PDF 568.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Thermal Management
FPGA-TN-02044 5.4 12/10/2024 PDF 1018.3 KB
Using TraceID
FPGA-TN-02084 2.7 12/10/2024 PDF 408 KB
Wafer-Level Chip-Scale Package Guide
FPGA-TN-02312 1.1 6/23/2022 PDF 236.5 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.6 3/19/2024 PDF 1.8 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-02081 1.1 8/27/2024 PDF 2.6 MB
CrossLink-NX High-Speed I/O Interface
FPGA-TN-02097 1.9 4/4/2024 PDF 2.8 MB
CrossLink-NX Hardened D-PHY Usage Guide
FPGA-TN-02081 1.1 6/21/2021 PDF 1.2 MB
Triple-Speed Ethernet MAC Driver API Reference
FPGA-TN-02341 1.1 7/29/2024 PDF 398.2 KB
Power Management and Calculation for CrossLink-NX Devices
FPGA-TN-02075 1.3 7/15/2021 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.5 8/1/2024 PDF 1.8 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.7 6/26/2024 PDF 1.3 MB
CrossLink-NX-33 and CrossLinkU-NX High-Speed I/O Interface
FPGA-TN-02280 0.85 9/1/2024 PDF 1.4 MB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.5 1/16/2025 PDF 1.8 MB
Adding Scalable Power and Thermal Management to Nexus FPGAs
FPGA-AN-02079 1.0 1/31/2024 PDF 1.3 MB
CrossLink-NX-33 and CrossLinkU-NX Hardware Checklist
FPGA-TN-02308 1.3 8/27/2024 PDF 969 KB
CrossLink-NX-33 Image Sensor Module Design Guide
FPGA-AN-02054 1.0 6/16/2022 PDF 396.1 KB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.8 11/6/2024 PDF 1.1 MB
CrossLink-NX Hardware Checklist
FPGA-TN-02149 1.6 6/30/2024 PDF 684.9 KB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.1 7/18/2024 PDF 614.6 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.2 1/7/2025 PDF 1.4 MB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.6 8/1/2024 PDF 368 KB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.5 2/5/2025 PDF 679.4 KB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 3.3 2/5/2025 PDF 3.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Package Diagrams
FPGA-DS-02053 8.4 12/11/2024 PDF 9 MB
CrossLink-NX caBGA256 Pin Migration Table
FPGA-SC-02014 1.0 10/27/2020 CSV 16.5 KB
CrossLink-NX QFN72 Pin Migration Table
FPGA-SC-02015 1.1 5/25/2022 CSV 5.6 KB
CrossLink-NX csfBGA121 Pin Migration Table
FPGA-SC-02016 1.0 10/27/2020 CSV 9.2 KB
CrossLink-NX LIFCL-33-Pinout
FPGA-SC-02040 0.80 8/31/2023 CSV 3.5 KB
CrossLink-NX-40-BG256-DD
1.0 10/16/2024 CSV 29.3 KB
CrossLink-NX LIFCL-17 Pinout
FPGA-SC-02006 0.92 10/26/2020 CSV 10.6 KB
CrossLink-NX-17-Package-DD
1.0 1/10/2024 CSV 19 KB
CrossLink-NX LIFCL-40 Pinout
FPGA-SC-02018 1.21 12/28/2020 CSV 35.5 KB
CrossLink-NX and Certus-NX Pin Migration
FPGA-TN-02218 1.0 3/22/2024 PDF 495.5 KB
CrossLink-NX LIFCL-33U-Pinout
FPGA-SC-02050 0.7 9/26/2023 CSV 4.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Always ON Module - User Guide
FPGA-IPUG-02216 1.0 9/26/2023 PDF 554.6 KB
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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subLVDS to MIPI CSI-2 Image Sensor Bridge with CrossLink-NX - Documentation
FPGA-RD-02217 1.0 5/1/2021 PDF 2.5 MB
subLVDS to MIPI CSI-2 Image Sensor Bridge with CrossLink-NX - Source Code
FPGA-RD-02217 1.0 5/1/2021 ZIP 6.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Notification of Changes to CrossLink-NX™ Data Sheet and Certus-NX™ Data Sheet
PCN02A-22 1.0 4/4/2022 PDF 329.6 KB
PCN02A-21- Release of Crosslink‐NX Datasheet Revision 1.2
PCN02A-21 1.0 10/19/2021 PDF 93.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs.
FPGA-SC-02005 8.4 12/10/2024 ZIP 2.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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ラティス CrossLink-NX:エッジでのエンベデッドビジョ ン プロセッシング
1.0 1/18/2020 PDF 629.8 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LIFCL-33 BBG484
FPGA-MD-02029 1.15 6/7/2022 BSM 32 KB
[BSDL] LIFCL-33 WLCSP84
FPGA-MD-02030 1.15 6/7/2022 BSM 20.6 KB
[BSDL] LIFCL-40
FPGA-MD-02061 1.0 4/15/2024 ZIP 35.3 KB
[BSDL] LIFCL-33U WLCSP84
FPGA-MD-02050 1.14 9/26/2023 BSM 18.9 KB
[BSDL] LIFCL-33U FCCSP104
FPGA-MD-02051 1.14 9/26/2023 BSM 20.4 KB
[BSDL] LIFCL-17
FPGA-MD-02010 1.14 12/16/2019 ZIP 19.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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CrossLink-NX Device Family DELPHI Models
FPGA-MD-02032 1.0 12/10/2019 ZIP 191.5 KB
CrossLinkU-NX DELPHI Models
FPGA-MD-02054 0.81 10/19/2023 ZIP 22.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[IBIS] LIFCL-33 and LIFCL-33U
FPGA-MD-02036 1.2 6/27/2024 ZIP 12.5 MB
[IBIS] LIFCL-17 and LIFCL-40
FPGA-MD-02067 1.0 6/27/2024 ZIP 12.6 MB

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