CertusPro-NX

Advanced General Purpose FPGA

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Lattice DevCon 2023

10G SERDES at Lowest Power and Smallest Package – Up to 8 SERDES lanes supporting up to 10.3 Gbps per lane, in packages as small as 9x9 mm. Up to 4x lower power vs. similar FPGAs.

More On-chip Memory, and LPDDR4 Support – Up to 7.3 Mb of on-chip memory. Only FPGA in class with LPDDR4 support. LPDDR4, DDR3/3L, LPDDR2 supported at 1066 Mbps.

Built on Lattice Nexus platform – Class-leading power efficiency. Up to 100x higher reliability, due to 100x lower Soft Error Rate (SER) from 28 nm FD-SOI technology.

CertusPro-NX

Features

  • Up to 100K logic cells, 7.3 Mb of embedded memory blocks (EBR, LRAM), 156 18 x 18 multipliers, 299 programmable I/O, 8 SERDES supporting up to 10.3 Gbps per lane and supporting popular protocols (10 Gig Ethernet, PCIe Gen 3, DisplayPort, SLVS-EC and CoaXPress).
  • Packages as small as 9x9 mm, and in ball-pitch options of 0.5, 0.8 and 1.0 mm.
  • Power modes – User selectable Low Power vs. High Performance modes, enabled by FD-SOI programmable back-bias.
  • Design security – ECDSA bitstream authentication, coupled with robust AES-256 encryption.
  • Fast configuration – I/O configures in 4 ms, and full-device in under 30 ms in 100K LC device.
  • Available in Commercial, Industrial and Automotive (AEC-Q100 qualified) temperature grades.

Jump to

Family Table

CertusPro-NX Device Selection Guide
Features LFCPNX-50 LFCPNX-100
Logic Cells 52K 96K
Embedded Memory (EBR) Bits (Kb) 1728
 3744
Large Memory (LRAM) Bits (Kb) 2048
 3584
18 X 18 Multipliers 96
 156
ADC Blocks 2
 2
GPLL 3
 4
PCIe Gen3 Hard IP 1
 1
Temperature Grades1 C, I, A C, I, A
0.5 mm Total I/O (Wide Range, High Performance, ADC3) / SERDES Lanes

LFCPNX-50 LFCPNX-100
ASG256 (9 x 9 mm)2 165 (75, 84, 6) / 4
 165 (75, 84, 6) / 4
0.8 mm Total I/O (Wide Range, High Performance, ADC3) / SERDES Lanes

LFCPNX-50 LFCPNX-100
CBG256 (14 x 14 mm)2 165 (75, 84, 6) / 4
 165 (75, 84, 6) / 4
BBG484 (19 x 19 mm)2 269 (167, 96, 6) / 4
 305 (167, 132, 6) / 8
1.0 mm Total I/O (Wide Range, High Performance, ADC3) / SERDES Lanes

LFCPNX-50 LFCPNX-100
BFG484 (23 x 23 mm) 269 (167, 96, 6) / 4
305 (167, 132, 6) / 4
LFG672 (27 x 27 mm) — 305 (167, 132, 6) / 8

1. C = Commercial, I = Industrial, A = Automotive
2. Available in Automotive Grade
3. Each ADC pin count reflects using dedicated complement pair and vRef

Example Solutions

Smart SFP+ Optical ModuleExpand Image

Smart SFP+ Optical Module

  • Implement enhanced Ethernet functions (e.g., Ethernet demarcation, OAM processing, SLA monitoring, etc.)
  • Compact packages as small as 9x9 mm with 10 Gigabit Ethernet support and 100K Logic Cells
  • Class-leading power efficiency for simpler thermal management
  • Hardened 10 Gigabit Ethernet PCS blocks supporting 10GBASE-R at 10.3125 Gbps, and available Ethernet MAC IP
Control Plane Security and Hardware ManagementExpand Image

Control Plane Security and Hardware Management

  • Bridge CPU via PCIe to multiple control plane peripherals (I2C, UART, GPIO), board management functions, and 10GE control plane traffic
  • Security functions (e.g., encryption, authentication) implemented in FPGA helps secure control plane traffic
  • 10G SERDES supporting PCIe Gen 3 x4 (in hard IP) and 10 Gigabit Ethernet (with 10GBASE-R PCS in hard IP)
  • High system reliability and up-time due to 100x lower Soft Error Rate (SER) from FD-SOI technology
  • Fast FPGA configuration supports board management needs and PCIe boot-time requirements
Machine Vision BDExpand Image

Machine Vision

  • Vision processing and bridging for high performance SLVS-EC sensors
  • 10G SERDES supporting SLVS-EC sensor interface, 10 GigE Vision and CoaXPress
  • 9x9 mm small size package and class-leading power efficiency meets stringent requirements of space and thermal budget constrained camera modules
  • Up to 7.3 Mb on-chip memory for ISP and vision processing
  • LPDDR4 external memory support for optional frame buffering
Frame Grabber BDExpand Image

Frame Grabber

  • Image acquisition, pre-processing and DMA over PCIe to host PC
  • 10G SERDES supporting 10 GigE Vision, CoaXPress and PCIe Gen 3 x4 (in hard IP)
  • Up to 7.3 Mb on-chip memory for video processing / tagging
  • LPDDR4 external memory support for optional frame buffering
Smart Camera AI ProcessingExpand Image

Smart Camera AI Processing

  • Offload AI processing and ISP from SoC
  • Interface with popular image sensors over MIPI at up to 1.5 Gbps per lane, using High Performance IO (HPIO)
  • Up to 7.3 Mb on-chip memory and flexible DSP resources to efficiently perform AI processing and ISP
  • LPDDR4 external memory support for frame buffering
  • Flexible output over MIPI or PCIe to SoC to enable smart device with high quality imaging

Videos

CertusPro-NX: Power Consumption Comparison
Expand Video

CertusPro-NX: Power Consumption Comparison

See a competitive power consumption demo comparing the power consumption of a Lattice CertusPro-NX running a 10 Gbps SERDES design with two similar competing FPGAs.
CertusPro-NX: AI/ML Analytics Demonstration
Expand Video

CertusPro-NX: AI/ML Analytics Demonstration

This demonstration highlights the advanced smart vision analytics enabled by a Lattice CertusPro-NX FPGA’s high internal memory density and fast parallel processing architecture.
CertusPro-NX: Reliability Comparison
Expand Video

CertusPro-NX: Reliability Comparison

A leading cause of silicon malfunctions are single event upsets (SEUs) caused by radiation particle strikes. In this competitive demonstration, the reliability of Lattice CertusPro-NX FPGAs when exposed to a stream of alpha particles is compared with two similar competing devices.

Awards

2022 LEAP AwardExpand Image

Leadership in Engineering Achievement Program (LEAP) Awards 2022

Gold Medal - Embedded Computing Category

2022 EW Best in ShowExpand Image

Embedded Computing Design’s Embedded World Best in Show Award

Processor & IP Category

Design Resources

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
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[IBIS AMI] CertusPro-NX
This document would be provided through Technical Support Request after sign-in to the Lattice web site. Please refer to Answer Database FAQ 6539 for detailed instructions. 		FPGA-MD-02047 1.0 5/19/2023 WEB
Package Diagrams
FPGA-DS-02053 7.6 10/19/2023 PDF 9.9 MB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.5 7/5/2022 PDF 3.1 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.3 9/26/2023 PDF 2 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.5 9/26/2023 PDF 1.6 MB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 2.7 9/26/2023 PDF 2.5 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.2 10/19/2023 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.2 8/9/2023 PDF 2.2 MB
CertusPro-NX High-Speed I/O Interface
FPGA-TN-02244 1.4 10/31/2023 PDF 3.6 MB
CertusPro-NX Hardware Checklist
FPGA-TN-02255 1.1 4/27/2023 PDF 401.4 KB
CertusPro-NX SerDes/PCS User Guide
FPGA-TN-02245 1.4 10/10/2023 PDF 4.3 MB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.7 9/4/2023 PDF 1.2 MB
Soft Error Detection (SED)/Correction (SEC) Usage Guide for Nexus Platform
FPGA-TN-02076 1.8 7/14/2023 PDF 555.3 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 1.6 9/26/2023 PDF 974.1 KB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.4 9/26/2023 PDF 307.1 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.8 9/26/2023 PDF 399.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.2 9/26/2023 PDF 8.1 MB
Thermal Management
FPGA-TN-02044 4.7 10/27/2023 PDF 1 MB
Using TraceID
FPGA-TN-02084 2.5 1/25/2023 PDF 400.6 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
CertusPro-NX Reinvigorates General-Purpose FPGAs
1.0 6/23/2021 PDF 294.4 KB
[IBIS] CertusPro-NX
FPGA-MD-02025 1.1 5/19/2023 ZIP 15 MB
[BSDL] LFCPNX-50 BBG484
FPGA-MD-02045 1.14 2/7/2023 BSM 66.2 KB
[BSDL] LFCPNX-50 BFG484
FPGA-MD-02045 1.14 2/7/2023 BSM 65.9 KB
[BSDL] LFCPNX-50 CBG256
FPGA-MD-02045 1.14 2/7/2023 BSM 50.9 KB
[BSDL] LFCPNX-100 CBG256
FPGA-MD-02024 1.14 6/23/2021 BSM 51 KB
[BSDL] LFCPNX-100 LFG672
FPGA-MD-02024 1.14 6/23/2021 BSM 73.4 KB
[BSDL] LFCPNX-100 BBG484
FPGA-MD-02024 1.14 6/23/2021 BSM 68.2 KB
[BSDL] LFCPNX-100 ASG256
FPGA-MD-02024 1.14 6/23/2021 BSM 51 KB
[BSDL] LFCPNX-50 ASG256
FPGA-MD-02045 1.14 2/7/2023 BSM 50.9 KB
CertusPro-NX Family Data Sheet
FPGA-DS-02086 1.6 10/25/2023 PDF 3.9 MB
CertusPro-NX 100K Pinout
FPGA-SC-02022 1.0 11/29/2021 CSV 33.5 KB
CertusPro-NX 50K Pinout
FPGA-SC-02045 1.0 2/11/2023 CSV 24.8 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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CertusPro-NX Family Data Sheet
FPGA-DS-02086 1.6 10/25/2023 PDF 3.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Memory User Guide for Nexus Platform
FPGA-TN-02094 1.5 7/5/2022 PDF 3.1 MB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.3 9/26/2023 PDF 2 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.5 9/26/2023 PDF 1.6 MB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 2.7 9/26/2023 PDF 2.5 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.2 10/19/2023 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.2 8/9/2023 PDF 2.2 MB
CertusPro-NX High-Speed I/O Interface
FPGA-TN-02244 1.4 10/31/2023 PDF 3.6 MB
CertusPro-NX Hardware Checklist
FPGA-TN-02255 1.1 4/27/2023 PDF 401.4 KB
CertusPro-NX SerDes/PCS User Guide
FPGA-TN-02245 1.4 10/10/2023 PDF 4.3 MB
ADC User Guide for Nexus Platform
FPGA-TN-02129 1.7 9/4/2023 PDF 1.2 MB
Soft Error Detection (SED)/Correction (SEC) Usage Guide for Nexus Platform
FPGA-TN-02076 1.8 7/14/2023 PDF 555.3 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 1.6 9/26/2023 PDF 974.1 KB
Advanced Configuration Security Usage Guide for Nexus Platform
FPGA-TN-02176 1.7 1/12/2023 PDF 3 MB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.4 9/26/2023 PDF 307.1 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.8 9/26/2023 PDF 399.4 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.2 9/26/2023 PDF 8.1 MB
Thermal Management
FPGA-TN-02044 4.7 10/27/2023 PDF 1 MB
Using TraceID
FPGA-TN-02084 2.5 1/25/2023 PDF 400.6 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Package Diagrams
FPGA-DS-02053 7.6 10/19/2023 PDF 9.9 MB
CertusPro-NX 100K Pinout
FPGA-SC-02022 1.0 11/29/2021 CSV 33.5 KB
CertusPro-NX 50K Pinout
FPGA-SC-02045 1.0 2/11/2023 CSV 24.8 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Cryptographic Engine (CRE) Demo for CertusPro-NX - User Guide
FPGA-UG-02193 0.80 10/9/2023 PDF 1.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 7.7 9/26/2023 ZIP 4.5 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Product Selector Guide
I0211 41.0 10/31/2023 PDF 7.5 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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CertusPro-NX Reinvigorates General-Purpose FPGAs
1.0 6/23/2021 PDF 294.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LFCPNX-50 BBG484
FPGA-MD-02045 1.14 2/7/2023 BSM 66.2 KB
[BSDL] LFCPNX-50 BFG484
FPGA-MD-02045 1.14 2/7/2023 BSM 65.9 KB
[BSDL] LFCPNX-50 CBG256
FPGA-MD-02045 1.14 2/7/2023 BSM 50.9 KB
[BSDL] LFCPNX-100 CBG256
FPGA-MD-02024 1.14 6/23/2021 BSM 51 KB
[BSDL] LFCPNX-100 LFG672
FPGA-MD-02024 1.14 6/23/2021 BSM 73.4 KB
[BSDL] LFCPNX-100 BBG484
FPGA-MD-02024 1.14 6/23/2021 BSM 68.2 KB
[BSDL] LFCPNX-100 ASG256
FPGA-MD-02024 1.14 6/23/2021 BSM 51 KB
[BSDL] LFCPNX-50 ASG256
FPGA-MD-02045 1.14 2/7/2023 BSM 50.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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CertusPro-NX Device Family Delphi Models
FPGA-MD-02026 1.1 11/30/2021 ZIP 37.2 KB
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[IBIS AMI] CertusPro-NX
This document would be provided through Technical Support Request after sign-in to the Lattice web site. Please refer to Answer Database FAQ 6539 for detailed instructions. 		FPGA-MD-02047 1.0 5/19/2023 WEB
[IBIS] CertusPro-NX
FPGA-MD-02025 1.1 5/19/2023 ZIP 15 MB

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