Certus-NX

Low-Power General Purpose FPGA

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Related Applications

Industry-leading I/O Count in Small Packages – Up to 2x more I/O per mm2 vs. similar FPGAs, in packages as small as 6x6 mm, with support for PCIe and GigE.

High-speed Interfaces – Up to 70% faster differential I/O (vs. similar FPGAs) at 1.5 Gbps. 5 Gbps PCIe, 1 Gbps GigE and 1066 Mbps DDR3 memory interfaces also supported.

Built on Lattice Nexus platform – Up to 4x lower power vs. similar FPGAs. Up to 100x higher reliability, due to 100x lower Soft Error Rate (SER) from 28 nm FD-SOI technology. Extended density range and features available in the CertusPro-NX family.

Certus-NX

Features

  • Up to 65K logic cells, 3.3 Mb embedded memory, 128 18 x 18 multipliers, 380 programmable I/O, one lane of 5 Gbps PCIe, two lanes of 1 Gbps GigE, two ADCs (each 12-bit, 1 MSPS).
  • Packages as small as 6x6 mm, and in ball-pitch options of 0.5 and 0.8 mm.
  • Power modes – User selectable Low Power vs. High Performance modes, enabled by FD-SOI programmable back-bias.
  • Design security – ECDSA bitstream authentication, coupled with robust AES-256 encryption.
  • Instant-on configuration – I/O configures in 3 ms, and full-device as fast as 8 ms.
  • Available in Commercial, Industrial and Automotive (AEC-Q100 qualified) temperature grades.

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Family Table

Certus-NX and CertusPro-NX Device Selection Guide
Certus-NX Device Selection Guide CertusPro-NX Device Selection Guide
Features LFD2NX-9 LFD2NX-15 LFD2NX-17 LFD2NX-25 LFD2NX-28 LFD2NX-35 LFD2NX-40 LFD2NX-65 LFCPNX-50 LFCPNX-100
Logic Cells 9K 15K 17K 25K 28K 35K 39K 65K 52K 96K
Embedded Memory (EBR) Bits (kb) 270 864 432 1440 1044 1890 1512 2304 1728 3744
Large Memory (LRAM) Bits (kb) 1536 512 2560 512 1024 512 1024 1024 2048 3584
18 X 18 Multipliers 12 12 24 20 40 48 56 128 96 156
ADC Blocks 2 2 2 2 2 2 2 2 2 2
GPLL 2 2 2 2 3 2 3 2 3 4
PCIe Hard IP — — — — Gen2 Gen2 Gen2 Gen2 Gen3 Gen3
DDR Memory DDR3/DDR3L, LPDDR2 1066Mbps x 16 DDR3/3L, LPDDR2/LPDDR4 1066Mbps x64
Temperature Grades1 (ms) C, I, A C, I C, I, A C, I C, I, A C, I C, I, A C, I C, I, A C, I, A
0.5 mm Total I/O (Wide Range, High Performance, ADC2) / PCIe Lane
LFD2NX-9 LFD2NX-15 LFD2NX-17 LFD2NX-25 LFD2NX-28 LFD2NX-35 LFD2NX-40 LFD2NX-65 LFCPNX-50 LFCPNX-100
121 csfBGA (6 x 6 mm) 77(23,48,6)/0 — 77(23,48,6)/0 — 81(23,58,0)/1 — 81(23,58 0)/1 — —
256 ASG256 (9 x 9 mm) — — — — — — — — 165(75,84,6)/4 165(75,84,6)/4
0.8 mm Total I/O (Wide Range, High Performance, ADC2) / PCIe Lane

LFD2NX-9 LFD2NX-15 LFD2NX-17 LFD2NX-25 LFD2NX-28 LFD2NX-35 LFD2NX-40 LFD2NX-65 LFCPNX-50 LFCPNX-100
196 caBGA (12 x 12 mm) 77(23,48,6)/0 — 77(23,48,6)/0 — 156(92,58,6)/0 — 156(92,58,6)/0 — — —
256 caBGA (14 x 14 mm) — 205(159,40,6)/0 — 205(159,40,6)/0 191(111,74,6)/1 ​ 181(145,30,6)/1 191(111,74,6)/1 ​ 181(145,30,6)/1 — —
256 CBG256 (14 x 14 mm) — — — — — — — — 165(75,84,6)/4 165(75,84,6)/4
400 caBGA (17 x 17 mm) — 311(257,48,6)/0​ — 311(257,48,6)/0​ — 313(259,48,6)/0 — 313(259,48,6)/0 — —
484 BBG484 (19 x 19 mm) — — — — — 371(317,48,6)/1 — 371(317,48,6)/1 269(167,96,6)/4 305(167,132,6)/8
1.0 mm Total I/O (Wide Range, High Performance, ADC2) / PCIe Lane

LFD2NX-9 LFD2NX-15 LFD2NX-17 LFD2NX-25 LFD2NX-28 LFD2NX-35 LFD2NX-40 LFD2NX-65 LFCPNX-50 LFCPNX-100
484 BFG484 (23 x 23 mm)3 — — — — — — — — 269(167,96,6)/4 305(167,132,6)/4
672 LFG672 (27 x 27 mm)3 — — — — — — — — — 305(167,132,6)/8

1. C = Commercial, I = Industrial, A = Automotive
2. Each ADC pin count reflects using dedicated complement pair and vRef
3. Not available in Automotive Grade

Example Solutions

PCIe to SGMII Bridge Block Diagram with Certus-NXExpand Image

PCIe to GigE Bridge

  • Bridge processor to Ethernet via PCIe Gen2
  • Compact packages as small as 6x6 mm with PCIe and GigE support
  • Hard blocks for PCIe Gen2 eases development
PCIe Control Place Bridge Block Diagram with Certus-NXExpand Image

PCIe Control Plane Bridge

  • Bridge processor via PCIe Gen2 to multiple control plane peripherals (UART, SPI, I2C, MDIO, etc.) and board management functions
  • Packages with high # of programmable I/O per mm2 maximizes # of interfaces in a given form-factor
  • PCIe hard IP with built-in Multi-function support simplifies development
  • Instant-on configuration supports board management needs and PCIe boot-time requirements
Co:processing Block Diagram with Certus-NXExpand Image

Co-processing

  • Off-load CPU by using Certus-NX as a co-processor to accelerate complex functions
  • DDR3 & LPDDR2 interface support (up to 1066 Mbps) and on-chip embedded memory (up to 2.9 Mbit) provide multiple options for data buffering
  • Compact packages as small as 6x6 mm with PCIe and DDR memory interface support
Motor Control Block Diagram with Certus-NXExpand Image

Motor Control

  • Increase efficiency and performance of motor control functions
  • High reliability due to 100x lower Soft Error Rate (SER) from 28 nm FD-SOI technology
  • Industrial temperature support

Design Resources

Development Kits & Boards

Our development boards & kits help streamline your design process

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Certus-NX Family Data Sheet
FPGA-DS-02078 2.4 7/15/2025 PDF 2.9 MB
Certus-NX 40K Pinout
FPGA-SC-02004 1.5 7/2/2025 CSV 12.1 KB
Certus-NX 9K Pinout
FPGA-SC-02059 1.0 7/18/2024 CSV 7.3 KB
Certus-NX 17K Pinout
FPGA-SC-02010 1.2 7/18/2024 CSV 7.5 KB
Certus-NX 9K/17K/28K/40K Migration Table for 121csfBGA
FPGA-SC-02061 1.1 3/30/2025 CSV 18.6 KB
Certus-NX 28K Pinout
FPGA-SC-02060 1.0 7/18/2024 CSV 30.8 KB
Package Diagrams
FPGA-DS-02053 8.5 8/5/2025 PDF 9.4 MB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.8 10/1/2025 PDF 2 MB
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
Certus-NX Product Brochure
I0275 2.0 8/25/2021 PDF 547.7 KB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-02341 1.2 6/26/2025 PDF 568.1 KB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.7 10/13/2025 PDF 1.9 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.7 6/26/2024 PDF 1.3 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.8 10/13/2025 PDF 820.9 KB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 3.5 7/15/2025 PDF 4.1 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.5 1/16/2025 PDF 1.8 MB
Certus-Nx High Speed IO Interface
FPGA-TN-02216 1.7 7/15/2025 PDF 2.9 MB
ADC User Guide for Nexus Platform
FPGA-TN-02129 2.1 10/13/2025 PDF 1.3 MB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.3 10/13/2025 PDF 806.2 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.4 8/27/2025 PDF 1.4 MB
Certus-NX Hardware Checklist
FPGA-TN-02151 1.9 11/5/2025 PDF 1008.9 KB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.8 10/13/2025 PDF 453.7 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.6 12/10/2024 PDF 560.4 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.2 12/11/2025 PDF 533.3 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 9.0 12/16/2025 ZIP 3.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Certus-NX Family Data Sheet
FPGA-DS-02078 2.4 7/15/2025 PDF 2.9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Advanced Configuration Security Usage Guide for Nexus Platform
Access this document via a Technical Support Request after signing in to the Lattice website. Complete the request form via this link, please click here. 		FPGA-TN-02176 2.1 9/23/2025 WEB
Memory User Guide for Nexus Platform
FPGA-TN-02094 1.8 10/1/2025 PDF 2 MB
Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-02081 1.1 8/27/2024 PDF 2.6 MB
Triple-Speed Ethernet Driver API Reference
FPGA-TN-02341 1.2 6/26/2025 PDF 568.1 KB
Power Management and Calculation for Certus-NX, CertusPro-NX, and MachXO5-NX Devices
FPGA-TN-02257 1.1 5/31/2022 PDF 1 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.7 10/13/2025 PDF 1.9 MB
sysDSP User Guide for Nexus Platform
FPGA-TN-02096 1.7 6/26/2024 PDF 1.3 MB
sysI/O User Guide for Nexus Platform
FPGA-TN-02067 2.8 10/13/2025 PDF 820.9 KB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 3.5 7/15/2025 PDF 4.1 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.4 12/11/2025 PDF 957.3 KB
I2C Hardened IP Usage Guide for Nexus Platform
FPGA-TN-02142 1.3 5/31/2022 PDF 1.4 MB
Common Programming and Configuration FAQs with Supplementary Concepts for CrossLink-NX, Certus-NX, and CertusPro-NX
FPGA-AN-02048 1.5 1/16/2025 PDF 1.8 MB
Adding Scalable Power and Thermal Management to Nexus FPGAs
FPGA-AN-02079 1.0 1/31/2024 PDF 1.3 MB
Certus-Nx High Speed IO Interface
FPGA-TN-02216 1.7 7/15/2025 PDF 2.9 MB
ADC User Guide for Nexus Platform
FPGA-TN-02129 2.1 10/13/2025 PDF 1.3 MB
Soft Error Detection (SED)/Correction (SEC) User Guide for Nexus Platform
FPGA-TN-02076 2.3 10/13/2025 PDF 806.2 KB
Multi-Boot User Guide for Nexus Platform
FPGA-TN-02145 2.4 8/27/2025 PDF 1.4 MB
Certus-NX Hardware Checklist
FPGA-TN-02151 1.9 11/5/2025 PDF 1008.9 KB
Single Event Upset (SEU) Report for Nexus Platform
FPGA-TN-02174 1.8 10/13/2025 PDF 453.7 KB
Certus-NX-17K/40K Migration to 196caBGA Package
FPGA-TN-02376 1.0 7/18/2024 PDF 300.6 KB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.6 12/10/2024 PDF 560.4 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 5.2 12/11/2025 PDF 533.3 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.6 12/10/2024 PDF 6.2 MB
Thermal Management
FPGA-TN-02044 5.8 12/11/2025 PDF 1.1 MB
I3C Target Driver API Reference
FPGA-TN-02338 1.0 12/21/2023 PDF 769.7 KB
I3C Controller Driver API Reference
FPGA-TN-02342 1.0 12/21/2023 PDF 894.8 KB
Using TraceID
FPGA-TN-02084 2.9 12/11/2025 PDF 491.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Certus-NX 40K Pinout
FPGA-SC-02004 1.5 7/2/2025 CSV 12.1 KB
Certus-NX 15K Pinout
FPGA-SC-02070 0.81 7/15/2025 CSV 16.1 KB
Certus-NX 25K Pinout
FPGA-SC-02071 0.81 7/15/2025 CSV 16.2 KB
Certus-NX 35K Pinout
FPGA-SC-02080 0.74 7/15/2025 CSV 22 KB
Certus-NX 65K Pinout
FPGA-SC-02081 0.74 7/15/2025 CSV 22 KB
FPGA-SC-02103-1-0-Certus-NX-Migration-Table-caBGA196
FPGA-SC-02103 1.0 7/15/2025 CSV 29.1 KB
Certus-NX 9K Pinout
FPGA-SC-02059 1.0 7/18/2024 CSV 7.3 KB
Certus-NX 17K Pinout
FPGA-SC-02010 1.2 7/18/2024 CSV 7.5 KB
Certus-NX 9K/17K/28K/40K Migration Table for 121csfBGA
FPGA-SC-02061 1.1 3/30/2025 CSV 18.6 KB
Certus-NX 28K Pinout
FPGA-SC-02060 1.0 7/18/2024 CSV 30.8 KB
Package Diagrams
FPGA-DS-02053 8.5 8/5/2025 PDF 9.4 MB
CrossLink-NX and Certus-NX Pin Migration
FPGA-TN-02218 1.0 3/22/2024 PDF 495.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice Memory Mapped Interface (LMMI) and Lattice Interrupt Interface (LINTR) User Guide
FPGA-UG-02039 1.2 5/31/2022 PDF 1.7 MB
sysCLOCK PLL Design and User Guide for Nexus Platform
FPGA-TN-02095 2.7 10/13/2025 PDF 1.9 MB
sysCONFIG User Guide for Nexus Platform
FPGA-TN-02099 3.5 7/15/2025 PDF 4.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Design Advisory for Nexus LVDS-based SGMII
FPGA-DA250601 1.0 6/3/2025 PDF 77.4 KB
Notification of Changes to CrossLink-NX™ Data Sheet and Certus-NX™ Data Sheet
PCN02A-22 1.0 4/4/2022 PDF 329.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice OrCAD Capture Schematic Library
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 9.0 12/16/2025 ZIP 3.2 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Lattice FPGA Product Selector Guide
v25.2.0 12/11/2025 PDF 609.7 KB
Certus-NX Product Brochure
I0275 2.0 8/25/2021 PDF 547.7 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Certus-NX Innovates General-Purpose FPGAs
1.0 6/24/2020 PDF 255.3 KB
Random Bin Picking Based On Structured-Light 3D Scanning
WP0043 2.0 5/22/2025 PDF 3.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LFD2NX-25
FPGA-MD-02113 0.8 7/15/2025 ZIP 18.4 KB
[BSDL] LFD2NX-40
FPGA-MD-02008 1.16 5/10/2023 BSM 44 KB
[BSDL] LFD2NX-35
FPGA-MD-02116 0.80 8/27/2025 ZIP 13 KB
[BSDL] LFD2NX-65
FPGA-MD-02117 0.80 8/28/2025 ZIP 12.9 KB
[BSDL] LFD2NX-17
FPGA-MD-02081 1.2 5/6/2025 ZIP 10.3 KB
[BSDL] LFD2NX-15
FPGA-MD-02112 0.80 7/29/2025 ZIP 18.4 KB
[BSDL] LFD2NX-28
FPGA-MD-02064 1.15 10/1/2024 ZIP 12.7 KB
[BSDL] LFD2NX-9
FPGA-MD-02065 1.15 10/1/2024 ZIP 12.3 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Certus-NX Device Family Delphi Models
FPGA-MD-02023 1.2 7/15/2025 ZIP 812.4 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[IBIS] LFD2NX-15/25
FPGA-MD-02110 0.8 7/15/2025 ZIP 14.9 MB
[IBIS AMI] LFD2NX
Access this document via a Technical Support Request after signing in to the Lattice website. Complete the request form via this link, please click here. 		FPGA-MD-02115 1.0 8/13/2025 WEB
[IBIS] LFD2NX-35/65
FPGA_MD_02109 0.8 7/15/2025 ZIP 14.9 MB
[IBIS] LFD2NX-9/17/28/40
FPGA-MD-02009 1.4 12/16/2025 ZIP 12.4 MB

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