Description:
WARNING <2019993> - MT420 |Found inferred clock cpu_pll_ipgen_lscc_pll_Z21_layer0|clkop_o_inferred_clock with period 1000.00ns. Please declare a user-defined clock on net cpu_system_i.cpu_pll_i.lscc_pll_inst.clk_50M.
Solution:
The warning means that the user has not defined the PLL input clock constraint.
The tool has found inferred clocks at the output of PLL. However, it is the user's responsibility to define PLL input clocks.
Defining the PLL input clock constraint will remove the warning