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ID: 6442
实例类型: faq
分类: Inquiries
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产品系列: CertusPro-NX

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MIPI for Nexus FPGAs: Does it allowed to assign MIPI signals (clock + data) across multiple different DQS group and implementing multiple MIPI signals (clock + data) in one DQS group?

Yes the user can assign MIPI signals across different DQS groups.
The current RD for CertusPro-NX implements the same idea.

Example#1 - MIPI signals across multiple DQS groups: MIPI DSI-CSI2-OpenLDI-LVDS-Int_Bridge

rx_clk_p_i MIPI_DPHY BDQ114

rx_clk_n_i LVCMOS12H BDQ114

rx_d3_p_i MIPI_DPHY BDQS114

rx_d3_n_i LVCMOS12H BDQSN114

rx_d2_p_i MIPI_DPHY BDQ114

rx_d2_n_i LVCMOS12H BDQ114

rx_d1_p_i MIPI_DPHY BDQ114

rx_d1_n_i LVCMOS12H BDQ114

rx_d0_p_i MIPI_DPHY BDQ126

rx_d0_n_i LVCMOS12H BDQ126


Example#2 - Multiple MIPI signals in one DQS group: MIPI DSI-CSI2-OpenLDI-LVDS-Int_Bridge

tx0_clk_p_o LVCMOS18H BDQ6

tx0_d3_p_o LVCMOS18H BDQ6

tx0_d1_p_o LVCMOS18H BDQSN6

tx0_d0_p_o LVCMOS18H BDQ6

tx1_clk_p_o LVCMOS18H BDQ6

tx1_d3_p_o LVCMOS18H BDQ6

tx1_d2_p_o LVCMOS18H BDQ6

tx1_d1_p_o LVCMOS18H BDQ6

tx1_d0_p_o LVCMOS18H BDQ30