The following is the power-up sequence for a MachXO device:
- All IOs trisate with a weak pull up
- POR (Power On Reset) for internal circuitry asserted
- Vcc and Vccaux reach minimum recommended datasheet levels
- POR (Power On Reset) for internal circuitry deasserted
- Device does a test to ensure Flash to SRAM transfer will be reliable
- Configuration data from Flash is transferred to SRAM
- SRAM Done bit is set
- Device wakeup sequence (including GS) is activated
- Device is active.
NOTES: There is hysteresis on the POR release point for VCC/AUX. There are no specific time requirements above POR. However, the device will take some time to perform the Flash test and configuration data transfer to SRAM, so it's really not visible or measurable.