A BSDL (Boundary Scan Description Language) file is available for every Lattice device with a JTAG port.
This file, standardized by the IEEE1149.1 specification, describes all information necessary to perform boundary scan testing. Included are register lengths, instruction mappings, the device ID code value, and boundary scan register order.
To download the BSDL file for any device, go to www.latticesemi.com > Click on \u201CProducts\u201D > Select \u201CFPGA & CPLDs\u201D > <Select the device of interest like MachXO3L> > Under \u201CDocumentation\u201D > DOWNLOADS > BSDL Model. Select and download the required BSM file.