This is true when your design is more of sequential nature, where more DFFs (D Flip-Flops) are used. The basic architecture of the iCE40 Logic Cell does not allow a direct and independent access to the DFFs.
Refer to Datasheet DS1045 and DS1040 for iCE40 Architecture. Figure 2-2 shows the architecture of a slice. It is evident that DFF does not have a direct access, any data signal accessing a DFF has to pass through LUT4, and thus an extra LUT4 is utilized. This accounts for extra LUT4s being consumed for iCE40 devices.
Datasheet of iCE40 device can be downloaded from the following location: https://www.latticesemi.com/ --> Go to Products --> iCE--> Click on iCE40 LP/HX -->On this page under "Documentation" section select "Data Sheet" and download the datasheet.