Yes the CPLD section can be addressed with I2C using the standard SDA,SCL pins. These can address I/O pins on the CPLD and read the A/D, as well as control the Trim functions. The customer can also build custom code to accept I2C control in the FPGA. With these methods, the FPGA can then communicate with the CPLD I/O, A/D and Trim features.
The Platform Manager Development Kit can demonstrate I2C features using the I2C Utility in the Tools Menu of PAC-Designer.
http://www.latticesemi.com/products/developmenthardware/developmentkits/platformmanagerdevelopmen.cfm