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ID: 967
实例类型: faq
分类: Lattice IP/Reference Design
相关: SGMII and Gb Ethernet PCS
产品系列: All FPGA

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LatticeECP2/M/LatticeECP3: Does the LatticeECP2M and LatticeECP3 SGMII and Gb Ethernet PCS IP "xmit_autoneg" port indicate autonegotiation [xmit] status as defined by IEEE 802.3 ?

The SGMII and Gb Ethernet PCS IP "xmit_autoneg" signal does not have the same definition as the xmit variable defined by the 802.3 spec. The 802.3 spec uses the xmit variable to indicate CONFIGURATION (/C/) IDLE (/I/) or Data condition for transmit and receive.

The xmit_autoneg in the SGMII and Gb Ethernet PCS IP Core is only used to control the PCS receive logic during autonegotiation.



The xmit_autoneg output pin is normally connected to the xmit port of the PCS in GbE mode (seeTN1124 "LatticeECP2M SERDES/PCS Usage Guide" --> "Idle Insert for Gigabit Ethernet Mode" section).

During autonegotiation, the SGMII/GbE PC IP asserts the xmit_autoneg to allow the PCS receive logic to insert periodic /I2/ ordered sets in the direction of the CTC block in order to prevent the CTC from overrrunning during the Auto negotiation phase.