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ID: 6736
实例类型: faq
分类: PLL/Clocks/Clock Tree
相关: PLL/DLL/Clock Routing
产品系列: Certus-NX

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How can I adjust the PLL phase shift in static mode?

These are the equations used to calculate the PLL phase shift.


Phase Shift = VCO Phase + Post Divider Phase

VCO Phase = 45 * (PHI / (DIV + 1))

Post Divider Phase = 360 * (DEL - DIV) / (DIV + 1)

 

You can find the PHI, DIV, and DEL values on the RTL file of the PLL.

You can edit the PHI, DIV, and DEL for specific clock output of the PLL to adjust the phase shift. Since you cannot edit it directly on the source editor in Radiant. You need to open the RTL file on Notepad, Notepad++, or any other external text editor.

 

For a 45-degree phase-shift,

You have 4, 59, and 66 values for PHI, DIV, and DEL respectively.

VCO Phase = 45 * (4 / (59 + 1)) = 3

Post Divider Phase = 360 * (66 - 59) / (59 + 1) = 42

Phase Shift = 3 + 42 = 45

 

By editing DIV to 56 of CLKOS, you will get approx. 66-degree phase shift with respect to CLKI and CLKOP. You can verify this through simulation.