[CrossLink] For 2:1 MIPI CSI-2 Bridge Soft IP debugging, what caused hs_sync_ch0 unexpected behavior?
The signals for sp_en is asserted every time there are frame start code, frame end code line start code and line end code through the data type. Line start and line end are optional as per CSI-2 specification v1.1. Thus, to enable in the testbench, the user should define it such as this:
+define+LS_LE_EN