An open drain IO drives output high as a 'Z' and drives low as a '0'. These IOs are often used when multiple devices are connected to a bus. On devices that do not have an open drain option, you can simulate an open drain circuit using an OE on the IO. Here is an example:
Verilog:
assign myoutput = (myenable) ? 1'b0 : 1'bz;
VHDL:
myoutput <= '0'
WHEN (myenable = '1')
ELSE 'Z';