Description:
When using the LatticeXP2 device in dual boot mode, the FPGA continuously drives the CSSPIN high.
The CSSPIN is considered a dual-purpose pin. However while the CFG0 pin = 0, controlling the dual-boot function, it will cause CSSPIN to be a dedicated configuration pin. CSSPIN will then drive high anytime it isn't trying to access the external SPI Flash device. Users desiring to use CSSPIN as a GPIO can make the CFG0 pin = 1 after configuration, this will return the CSSPIN pin to its default I/O behavior allowing GPIO use of the pin.