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莱迪思半导体的AHB-Lite到APB桥接模块提供了连接高速AHB-Lite和低功耗APB之间的接口。在许多应用中,AHB-Lite系统运行的时钟频率比APB更高。该模块拥有可选的跨时钟域桥功能,可以在IP配置期间启用。
该设计通过Verilog HDL实现。可以使用莱迪思Propel Builder软件配置和生成IP。