Lattice Press Release

Lattice Announces Revolutionary Power Management Architecture

Unprecedented Flexibility and Scalability Enable Power Management of Circuit Boards with up to 36 Power Supply Rails

HILLSBORO, OR – May 7, 2012 – Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced a scalable, in-system upgradable, star topology power management architecture that can be used across a wide range of circuit boards requiring more than 12 power supply rails. Lattice has simultaneously made available two new application notes for its award winning Platform Manager™ devices that will enable customers to quickly adopt the new architecture.

"The number of power supply rails in a circuit board has been steadily increasing," said Shakeel Peera, Director of Strategic Marketing for Lattice Semiconductor. "These new application notes help expedite implementation of a centralized, scalable and flexible power management algorithm within a single Platform Manager device."

Power management functions include supply sequencing, monitoring, hot-swap control, reset and other supervisory signal generation. The complexity of power management functions grows significantly when the number of circuit board power supplies increases. The solution often demands the use of multiple power management devices. As a result, designers typically are forced to partition the overall power management task and implement it using distributed algorithms in multiple devices, a costly and time consuming approach. The inadequacies of this approach become apparent only during the board debug stage, forcing board re-spin and costly project delays. The integrated power management approach made possible by the Platform Manager devices, on the other hand, reduces cost and increases board reliability.

The application notes describe unrestricted access to power supply status indicators and the ability to control all board management functions. Designers are easily able to modify their algorithm to meet unforeseen power management requirements and minimize the need for a board re-spin.

Two New Platform Manager Application Notes

AN6089: Scalable Centralized Power Management with Field Upgrade Support

  • Describes how the Platform Manager device can be used as a centralized controller to implement flexible sequencing and precision monitoring of up to 36 power supply rails on a circuit board.
  • Discusses the use of a star topology and fast serial interface to provide a seamless, scalable solution to manage up to 36 power supply rails using additional Lattice Power Manager II devices.

Download Platform Manager Application Note AN6089

AN6088: Fail-Safe Sequencing During Field Upgrades with Platform Manager

  • Describes how to enable field updates to the power management algorithm with a fail-safe sequencing backup that restores board operation if the field update procedure is interrupted.

Download Platform Manager Application Note AN6088

Software Support for Power Manager II and Platform Manager Products

Designs for the Power Manager II and Platform Manager devices are implemented using Lattice PAC-Designer® and Lattice Diamond® design software tools that are available for download free of charge from the Lattice website at www.latticesemi.com/pac-designer and www.latticesemi.com/latticediamond.

For more information about Power Manager Devices, visit http://www.latticesemi.com/products/powermanager/index.cfm.

About the Platform Manager Family

The innovative Platform Manager product family consists of two devices, the LPTM10-1247 and LPTM10-12107. The LPTM10-1247 device can monitor 12 power supply rails and supports 47 combined digital inputs and digital outputs, while the LPTM10-12107 monitors up to 12 power supply rails and supports 107 combined digital inputs and digital outputs. Functionally, these devices include both a power management section and a digital board management section. The power management section consists of a programmable threshold, precision differential input comparator block with an accuracy of 0.7%, a 48-macrocell CPLD, programmable hardware timers, a 10-bit analog to digital converter and a trim block for the trimming and margining of supplies. The digital board management section consists of a 640-LUT FPGA and programmable logic interface I/O.

All Lattice mixed-signal product families are supported by development kits and reference designs that enable fast, easy product development.

About Lattice Semiconductor

Lattice is a service-driven developer of innovative low cost, low power programmable design solutions. For more information about how our FPGA, CPLD, and programmable power management devices help our customers unlock their innovation, visit www.latticesemi.com. You can also follow us via Twitter, Facebook, or RSS.

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Lattice Semiconductor Corporation, Lattice (& design), L (& design), Platform Manager, PAC-Designer, Lattice Diamond and specific product designations are either registered trademarks or trademarks of Lattice Semiconductor Corporation or its subsidiaries in the United States and/or other countries.

GENERAL NOTICE: Other product names used in this publication are for identification purposes only and may be trademarks of their respective holders.

For more information contact:
Brian Kiernan, Corporate Communications Manager
Lattice Semiconductor Corporation
brian.kiernan@latticesemi.com
voice: (503) 268-8739
fax: (503) 268-8193

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