ECP5 / ECP5-5G

Break the rules of power, size and cost in your connectivity and acceleration applications

Related Products


Embedded Vision Development Kit

Why Pay More For Less? – Costing less than competing FPGAs, ECP5 and ECP5-5G provide connectivity to ASICs and ASSPs with improved routing architecture, dual channel SERDES, and enhanced DSP blocks for up to 4x improved multiplier utilization.

Small Packages, Twice the Functional Density – Up to 85K LUTs in 10 x 10 mm, 0.5 mm pitch package with SERDES. Smart ball depopulation simplifies package integration with existing low cost PCB technology.

30% Lower Power Consumption – Low static and dynamic power with single channel SERDES functions below 0.25 W and quad channel SERDES functions below 0.5 W.

Features

  • Up to 3.2 Gbps SERDES rate with ECP5, and up to 5 Gbps with ECP5-5G
  • Up to 4 channels per device in dual channel blocks for higher granularity
  • Enhanced DSP blocks provide 2x resource improvement for symmetrical filters
  • Single event upset (SEU) mitigation support
  • Programmable IO support for LVCMOS 33/25/18/15/12, XGMII, LVTTL, LVDS, Bus-LVDS, 7:1 LVDS, LVPECL and MIPI D-PHY input/output interfaces

Jump to

Family Table

ECP5 and ECP5-5G Device Selection Guide
Device LFE5UM-25
LFE5UM5G-25		 LFE5UM-45
LFE5UM5G-45		 LFE5UM-85
LFE5UM5G-85		 LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
LUTs (K) 24 44 84 12 24 44 84
sysMEM Blocks (18 Kbits) 56 108 208 32 56 108 208
Embedded Memory (Kbits) 1008 1944 3744 576 1008 1944 3744
Distributed RAM Bits (Kbits) 194 351 669 97 194 351 669
18 x 18 Multipliers 28 72 156 28 28 72 156
SERDES (Dual/Channel) 1 / 2 2 / 4 2 / 4 0 0 0 0
PLLs/DLLs 2 / 2 4 / 4 4 / 4 2 / 2 2 / 2 4 / 4 4 / 4
0.5 mm Spacing I/O Count / SERDES
  LFE5UM-25
LFE5UM5G-25		 LFE5UM-45
LFE5UM5G-45		 LFE5UM-85
LFE5UM5G-85		 LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
144 TQFP (20 x 20 mm)


98 / 0 98 / 0 98 / 0
285 csfBGA (10 x 10 mm) 118 / 2 118 / 2 118 / 2 118 / 0 118 / 0 118 / 0 118 / 0
0.8 mm Spacing I/O Count / SERDES
  LFE5UM-25
LFE5UM5G-25		 LFE5UM-45
LFE5UM5G-45		 LFE5UM-85
LFE5UM5G-85		 LFE5U-12 LFE5U-25 LFE5U-45 LFE5U-85
256 caBGA (14 x 14 mm)


197 / 0 197 / 0 197 / 0
381 caBGA (17 x 17 mm) 197 / 2 203 / 4 205 / 4 197 / 0 197 / 0 203 / 0 205 / 0
554 caBGA (23 x 23 mm)
245 / 4 259 / 4

245 / 0 259 / 0
756 caBGA (27 x 27 mm)

365 / 4


365 / 0
ECP5 Automotive Device Selection Guide
Device LAE5U-12 LAE5UM-25 LAE5UM-45
LUTs (K) 12 24 44
sysMEM Blocks (18 Kbits) 32 56 108
Embedded Memory (Kbits) 576 1008 1994
Distributed RAM Bits (Kbits) 97 194 351
18 x 18 Multipliers 28 28 72
SERDES (Dual/Channel) 0 1 / 2 2 / 4
PLLs/DLLs 2 / 2 2 / 2 4 / 4
0.8 mm Spacing I/O Count / SERDES
  LAE5U-12 LAE5UM-25 LAE5UM-45
381 caBGA (17 x 17 mm) 197 / 0 197 / 2 203 / 4

Example Solutions

ECP5 FPGAs provide a low cost, low power, small form factor solution for implementing connectivity and video and imaging functionality in high volume applications such as small cells, industrial video cameras and broadband access equipment.

Automotive InfotainmentExpand Image

Automotive Infotainment Solution

  • Flexibility driving single or multiple displays for dashboard, instrument cluster displays and rear-seat entertainment applications.
  • High-speed SERDES channels provide video interfaces to Open LDI, LVDS FPD-Link, eDP, PCIe, and GigE.
  • Control peripheral functions and power sequencing of displays using GPIO.
Low Cost Connectivity for Small Cell Wireless Basestations Block Diagram

Low Cost Connectivity for Small Cell Wireless Base Stations

  • Flexible interfacing options to digital front end (DFE) including CPRI, ORI and compressed CPRI
  • DFE augment processing for pico cells such as multi-carrier DUC/DDC and CFR
  • Flexible interfacing options to analog front end including LVDS, JESD207, and JESD204B
Low Power Integration for Industrial Video Cameras Block Diagram

Low Power Integration for Industrial Video Cameras

  • Direct interfacing capability with single or multiple image sensors (MIPI CSI-2, sub-LVDS, HiSPi, Parallel)
  • High-performance Wide Dynamic Range (WDR) and Image Signal Processing capabilities supported by embedded block RAM (EBR), and embedded DSP blocks
  • Flexible video interfacing options including integrated high-speed SERDES channels, LVDS, PCIe, and GigE
Small Form Factor Solution for Smart SFPs Block Diagram

Small Form Factor Solution for Smart SFPs

  • Smart SFP solution with integrated Operation and Maintenance (OAM) for remote control
  • ECP5/ECP5-5G in a 10 x 10 mm package enables small form factor solution for optical modules
  • SERDES and triple speed MAC for low-cost, low-power connectivity
Low-Cost, Low-Power PCIe Side-Band Solution for MicroserversExpand Image

Low-Cost, Low-Power PCIe Side-Band Solution for Microservers

  • Extract control plane data from I2C or SPI onto a high speed link such as PCIe.
  • Implemented with low-power and size overhead PCIe sideband signaling.
  • Leverage low-cost ECP5/ECP5-5G SERDES, SGMII, and PCIe Gen 1 (2.5 Gbps) and Gen 2 (5 Gbps).

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

To subscribe, or modify your subscription, to Document Notifications please login to your Lattice account

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Workaround for Lattice ECP5 (LFE5UM) Known Issue with SerDes Interface Connections Due to Unstable Reset Soft Logic
FPGA-PB-02001 1.1 4/25/2024 PDF 1010.9 KB
ECP5 Errata - SED Function with Distributed RAM
PB1384 1.0 4/14/2017 PDF 358.5 KB
ECP5 and ECP5-5G Family Data Sheet
FPGA-DS-02012 3.3 1/31/2024 PDF 2.6 MB
ECP5 Automotive Family Data Sheet
FPGA-DS-02014 1.7 12/14/2022 PDF 1.4 MB
ECP5U to ECP5UM caBGA381 Migration
1.0 3/30/2018 CSV 83.4 KB
ECP5UM to ECP5UM5G caBGA554 Migration
1.0 3/30/2018 CSV 65.4 KB
ECP5UM5G-85 Pinout
1.0 2/23/2016 CSV 40.7 KB
ECP5U-45 Pinout
FPGA-SC-02034 3.0 9/17/2021 CSV 31.2 KB
ECP5UM5G csfBGA285 Migration
1.0 2/23/2016 CSV 25 KB
ECP5U caBGA381 Migration
1.1 2/23/2016 CSV 44.4 KB
ECP5UM5G-45 Pinout
1.0 2/23/2016 CSV 28.1 KB
ECP5UM-45 Pinout
1.0 2/11/2015 CSV 28.1 KB
ECP5UM-85 Pinout
1.0 2/11/2015 CSV 40.7 KB
ECP5UM csfBGA285 Migration
1.0 2/11/2015 CSV 25 KB
ECP5UM caBGA381 Migration
1.0 2/11/2015 CSV 35.1 KB
ECP5U-25 Pinout
FPGA-SC-02033 2.0 9/17/2021 CSV 23.5 KB
ECP5UM5G caBGA554 Migration
1.0 2/23/2016 CSV 32.4 KB
ECP5U-85 Pinout
1.0 2/11/2015 CSV 39.6 KB
ECP5U to ECP5UM csfBGA285 Migration
1.0 3/30/2018 CSV 51 KB
ECP5UM to ECP5UM5G csfBGA285 Migration
1.0 3/30/2018 CSV 50.8 KB
ECP5U csfBGA285 Migration
1.0 2/11/2015 CSV 24.1 KB
ECP5UM5G-25 Pinout
1.0 2/23/2016 CSV 20.4 KB
ECP5UM5G caBGA381 Migration
1.0 2/23/2016 CSV 35.1 KB
ECP5U-12 Pinout
FPGA-SC-02032 2.0 9/17/2021 CSV 23.5 KB
ECP5UM to ECP5UM5G caBGA381 Migration
1.0 3/30/2018 CSV 70.9 KB
ECP5U caBGA 256 Migration
2.0 3/30/2018 CSV 25.9 KB
ECP5U to ECP5UM caBGA554 Migration
1.0 3/30/2018 CSV 65.3 KB
ECP5UM caBGA554 Migration
1.0 2/11/2015 CSV 32.4 KB
ECP5U caBGA554 Migration
1.0 2/11/2015 CSV 31 KB
ECP5UM-25 Pinout
1.0 2/11/2015 CSV 20.4 KB
Package Diagrams
FPGA-DS-02053 8.2 9/22/2024 PDF 9 MB
ECP5 and ECP5-5G sysCONFIG User Guide
FPGA-TN-02039 2.3 3/7/2024 PDF 2 MB
ECP5 and ECP5-5G SerDes/PCS Usage Guide
FPGA-TN-02206 1.7 8/28/2023 PDF 2.9 MB
ECP5 and ECP5-5G Hardware Checklist
FPGA-TN-02038 2.0 7/28/2024 PDF 584.1 KB
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.2 1/24/2022 PDF 918.9 KB
ECP5 and ECP5-5G Memory User Guide
FPGA-TN-02204 1.6 11/30/2023 PDF 940.1 KB
ECP5 and ECP5-5G sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02200 1.3 4/12/2022 PDF 1.1 MB
ECP5 and ECP5-5G High-Speed I/O Interface
FPGA-TN-02035 1.3 10/29/2020 PDF 3 MB
ECP5 and ECP5-5G sysIO Usage Guide
FPGA-TN-02032 1.4 1/25/2023 PDF 1.1 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.2 9/10/2024 PDF 1.2 MB
Programming External SPI Flash through JTAG for ECP5/ECP5-5G
FPGA-TN-02050 1.0 10/17/2017 PDF 1.6 MB
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
FPGA-AN-02019 1.2 8/7/2023 PDF 2 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Using TraceID
FPGA-TN-02084 2.6 5/19/2024 PDF 411.2 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-02202 1.8 7/22/2024 PDF 2.2 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Power Consumption and Management for ECP5 Devices
FPGA-TN-02210 1.4 5/16/2023 PDF 817.1 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Thermal Management
FPGA-TN-02044 5.2 8/21/2024 PDF 756 KB
ECP5 LFE5U-45 BGA 256 Schematic Symbol
3/30/2018 OLB 29 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.5 10/13/2024 PDF 6.6 MB
ECP5 and ECP5-5G sysDSP Usage Guide
FPGA-TN-02205 1.3 10/8/2024 PDF 963.8 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ECP5 and ECP5-5G Family Data Sheet
FPGA-DS-02012 3.3 1/31/2024 PDF 2.6 MB
ECP5 Automotive Family Data Sheet
FPGA-DS-02014 1.7 12/14/2022 PDF 1.4 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Migrating Designs from AMD CPLD/FPGA Devices to Lattice FPGA Devices
FPGA-AN-02081 1.1 8/27/2024 PDF 2.6 MB
ECP5 and ECP5-5G sysCONFIG User Guide
FPGA-TN-02039 2.3 3/7/2024 PDF 2 MB
ECP5 and ECP5-5G SerDes/PCS Usage Guide
FPGA-TN-02206 1.7 8/28/2023 PDF 2.9 MB
ECP5 and ECP5-5G Hardware Checklist
FPGA-TN-02038 2.0 7/28/2024 PDF 584.1 KB
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.2 1/24/2022 PDF 918.9 KB
ECP5 and ECP5-5G Memory User Guide
FPGA-TN-02204 1.6 11/30/2023 PDF 940.1 KB
ECP5 and ECP5-5G sysCLOCK PLL/DLL Design and Usage Guide
FPGA-TN-02200 1.3 4/12/2022 PDF 1.1 MB
ECP5 and ECP5-5G High-Speed I/O Interface
FPGA-TN-02035 1.3 10/29/2020 PDF 3 MB
ECP5 and ECP5-5G sysIO Usage Guide
FPGA-TN-02032 1.4 1/25/2023 PDF 1.1 MB
Electrical Recommendations for Lattice SERDES
FPGA-TN-02077 3.2 9/10/2024 PDF 1.2 MB
Programming External SPI Flash through JTAG for ECP5/ECP5-5G
FPGA-TN-02050 1.0 10/17/2017 PDF 1.6 MB
Adding Scalable Power and Thermal Management to ECP5 Using L-ASC10
FPGA-AN-02019 1.2 8/7/2023 PDF 2 MB
MIPI D-PHY Bandwidth Matrix and Implementation
FPGA-TN-02090 1.3 5/23/2024 PDF 947.5 KB
Using TraceID
FPGA-TN-02084 2.6 5/19/2024 PDF 411.2 KB
Minimizing System Interruption During Configuration Using TransFR Technology
FPGA-TN-02198 4.4 10/17/2023 PDF 1.4 MB
Advanced Security Encryption Key Programming Guide for ECP Device Family
FPGA-TN-02202 1.8 7/22/2024 PDF 2.2 MB
LatticeECP3, LatticeECP2/M, ECP5 and ECP5-5G Dual Boot and Multiple Boot Feature
FPGA-TN-02203 1.8 10/26/2021 PDF 1.3 MB
Sub-LVDS Signaling Using Lattice Devices
FPGA-TN-02028 2.5 10/9/2023 PDF 540.2 KB
Power Consumption and Management for ECP5 Devices
FPGA-TN-02210 1.4 5/16/2023 PDF 817.1 KB
Solder Reflow Guide for Surface Mount Devices
FPGA-TN-02041 4.9 9/23/2024 PDF 878.5 KB
Soft Error Detection SED Usage Guide
FPGA-TN-02207 2.0 5/31/2022 PDF 815.1 KB
Thermal Management
FPGA-TN-02044 5.2 8/21/2024 PDF 756 KB
PCB Layout Recommendations for BGA Packages
FPGA-TN-02024 5.5 10/13/2024 PDF 6.6 MB
ECP5 and ECP5-5G sysDSP Usage Guide
FPGA-TN-02205 1.3 10/8/2024 PDF 963.8 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ECP5U to ECP5UM caBGA381 Migration
1.0 3/30/2018 CSV 83.4 KB
ECP5UM to ECP5UM5G caBGA554 Migration
1.0 3/30/2018 CSV 65.4 KB
ECP5UM5G-85 Pinout
1.0 2/23/2016 CSV 40.7 KB
ECP5U-45 Pinout
FPGA-SC-02034 3.0 9/17/2021 CSV 31.2 KB
ECP5UM5G csfBGA285 Migration
1.0 2/23/2016 CSV 25 KB
ECP5U caBGA381 Migration
1.1 2/23/2016 CSV 44.4 KB
ECP5UM5G-45 Pinout
1.0 2/23/2016 CSV 28.1 KB
ECP5UM-45 Pinout
1.0 2/11/2015 CSV 28.1 KB
ECP5UM-85 Pinout
1.0 2/11/2015 CSV 40.7 KB
ECP5UM csfBGA285 Migration
1.0 2/11/2015 CSV 25 KB
ECP5UM caBGA381 Migration
1.0 2/11/2015 CSV 35.1 KB
ECP5U-25 Pinout
FPGA-SC-02033 2.0 9/17/2021 CSV 23.5 KB
ECP5UM5G caBGA554 Migration
1.0 2/23/2016 CSV 32.4 KB
ECP5-85F-CABGA381-DD
1.0 1/10/2024 CSV 25 KB
ECP5-45F-CABGA256-DD
1.0 1/10/2024 CSV 14.5 KB
ECP5-25F-CABGA256-DD
1.0 1/10/2024 CSV 11.5 KB
ECP5U-85 Pinout
1.0 2/11/2015 CSV 39.6 KB
ECP5U to ECP5UM csfBGA285 Migration
1.0 3/30/2018 CSV 51 KB
ECP5UM to ECP5UM5G csfBGA285 Migration
1.0 3/30/2018 CSV 50.8 KB
ECP5U csfBGA285 Migration
1.0 2/11/2015 CSV 24.1 KB
ECP5UM5G-25 Pinout
1.0 2/23/2016 CSV 20.4 KB
ECP5UM5G caBGA381 Migration
1.0 2/23/2016 CSV 35.1 KB
ECP5U-12 Pinout
FPGA-SC-02032 2.0 9/17/2021 CSV 23.5 KB
ECP5UM to ECP5UM5G caBGA381 Migration
1.0 3/30/2018 CSV 70.9 KB
ECP5U caBGA 256 Migration
2.0 3/30/2018 CSV 25.9 KB
ECP5U to ECP5UM caBGA554 Migration
1.0 3/30/2018 CSV 65.3 KB
ECP5UM caBGA554 Migration
1.0 2/11/2015 CSV 32.4 KB
ECP5U caBGA554 Migration
1.0 2/11/2015 CSV 31 KB
ECP5UM-25 Pinout
1.0 2/11/2015 CSV 20.4 KB
ECP5-45F-CABGA381-DD
1.0 3/19/2024 CSV 18.4 KB
Package Diagrams
FPGA-DS-02053 8.2 9/22/2024 PDF 9 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ECP5 PCI Express Development Board User's Guide
FPGA-EB02037 1.1 9/6/2021 PDF 8.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
Sony Parallel Sub-LVDS-to-Parallel Sensor Bridge User's Guide
FPGA-RD-02147 1.8 8/19/2021 PDF 888 KB
SD Flash Controller Using SD Bus - Documentation
RD1088 1.4 3/12/2014 PDF 1.4 MB
Sony Parallel sub-LVDS Sensor Bridge - Source Code
RD1122 1.7 1/2/2015 ZIP 2.5 MB
SD Flash Controller Using SD Bus - Source Code
RD1088 1.4 3/12/2014 ZIP 5 MB
HDMI/DVI Video Interface Reference Design - Source Code
RD1097 1.5 4/1/2015 ZIP 6.8 MB
HDMI/DVI Video Interface Reference Design
FPGA-RD-02139 1.6 2/5/2021 PDF 1.5 MB
HiSPi-to-Parallel Sensor Bridge
FPGA-RD-02069 1.4 4/1/2014 PDF 1013.1 KB
I2C Master with WISHBONE Bus Interface - Source Code
RD1046 1.8 2/1/2016 ZIP 1.4 MB
I2C Controller for Serial EEPROMs - Documentation
RD1006 2.6 3/5/2014 PDF 767.9 KB
I2C (Inter-Integrated Circuit) Master Controller - Source Code
RD1005 5.9 1/10/2015 ZIP 809.7 KB
I2C Controller for Serial EEPROMs - Source Code
RD1006 2.7 1/12/2015 ZIP 613.5 KB
I2C Master with WISHBONE Bus Interface - Documentation
RD1046 1.6 1/15/2015 PDF 1.4 MB
I2C (Inter-Integrated Circuit) Master Controller - Documentation
RD1005 5.8 3/6/2014 PDF 987.4 KB
Advanced SDR SDRAM Controller - Design Documentation
FPGA-RD-02087 4.9 1/22/2021 PDF 1.1 MB
BSCAN2 - Multiple Boundary Scan Port Linker - Source Code
RD1002 4.6 3/13/2014 ZIP 2.6 MB
Advanced SDR SDRAM Controller - Source Code
RD1010 4.8 9/12/2014 ZIP 495.7 KB
RGMII to GMII Bridge Reference Design
FPGA-RD-02136 2.5 6/23/2021 PDF 762.7 KB
RGMII to GMII Bridge - Source Code
FPGA-RD-02136 6/23/2021 ZIP 968.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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Workaround for Lattice ECP5 (LFE5UM) Known Issue with SerDes Interface Connections Due to Unstable Reset Soft Logic
FPGA-PB-02001 1.1 4/25/2024 PDF 1010.9 KB
ECP5 Errata - SED Function with Distributed RAM
PB1384 1.0 4/14/2017 PDF 358.5 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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PCN04A-17 ECP5 Data Sheet Change
PCN04A-17 1/1/0001 PDF 469.7 KB
PCN07A-17 ECP5 285-csfBGA MSL5 to MSL3 transition
PCN07A-17 1.1 1/1/0001 PDF 341.7 KB
PCN 02A-16 ECP5/ECP5-5G updates on Diamond v3.7
PCN02A-16 1.0 3/1/2016 PDF 162.6 KB
Alternate Qualified Foundry Mask Sets for selected ECP5 and Crosslink devices
PCN11A-19 12/12/2019 PDF 154.7 KB
PCN09A-19 BOM comparison final
2.0 1/8/2020 XLSX 24.8 KB
Standard OPNs for ASEK PCN09A-19
2.0 1/8/2020 XLSX 24.4 KB
PCN09A-19 ASEK Second Source Qualification for Selected Products
1/9/2020 PDF 359 KB
PCN09A-19 Consolidation Qual External Changes
1/9/2020 PDF 326.2 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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ECP5 LFE5U-45 BGA 256 Schematic Symbol
3/30/2018 OLB 29 KB
Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 8.2 8/8/2024 ZIP 2.6 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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ECP5 and ECP5-5G Product Brochure
I0242 Rev E. 3/19/2018 PDF 887 KB
Product Selector Guide
I0211 46.0 7/18/2024 PDF 9.7 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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BG381_LAE5
Rev H1 6/9/2022 PDF 141.2 KB
MG285_FE5
Rev F 3/4/2021 PDF 122.3 KB
BG381_FE5
Rev G1 6/9/2022 PDF 141.4 KB
BG256_XO2
Rev O1 6/9/2022 PDF 75.3 KB
BG554_FE5
Rev F1 6/9/2022 PDF 141.4 KB
BG756_FE5
Rev G1 6/9/2022 PDF 142.2 KB
ECP5 Product Family Qualification Summary
Rev K 10/6/2020 PDF 568.6 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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SOLVING INTELLIGENCE, VISION & CONNECTIVITY CHALLENGES AT THE EDGE WITH ECP5™ FPGAs
WP0010 1.0 12/19/2017 PDF 3.9 MB
Enabling Programmable Connectivity Solutions for Compact, High Volume Applications
1.0 10/21/2014 PDF 7.1 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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[BSDL] LFE5U-25F CABGA256
1.13 6/22/2018 BSM 43.3 KB
[BSDL] LFE5U-45F CABGA256
1.13 6/22/2018 BSM 47.2 KB
[BSDL] LFE5UM85F CABGA381
1.13 12/2/2016 BSM 61.1 KB
[BSDL] LAE5UM45F CSFBGA285
1.13 12/2/2016 BSM 44 KB
[BSDL] LAE5UM25F CSFBGA285
1.13 12/2/2016 BSM 40.2 KB
[BSDL] LFE5U25F CABGA381
1.13 12/2/2016 BSM 46.9 KB
[BSDL] LFE5UM85F CABGA756
1.13 12/2/2016 BSM 80.8 KB
[BSDL] LFE5U85F CABGA381
1.13 12/2/2016 BSM 59.6 KB
[BSDL] LAE5UM25F CABGA381
1.13 12/2/2016 BSM 47.7 KB
[BSDL] LFE5UM25F CSFBGA285
1.13 12/2/2016 BSM 40.2 KB
[BSDL] LFE5U85F CABGA554
1.13 12/2/2016 BSM 67.6 KB
[BSDL] LFE5U45F CABGA554
1.13 12/2/2016 BSM 58.4 KB
[BSDL] LFE5UM45F CABGA381
1.13 12/2/2016 BSM 52.8 KB
[BSDL] LFE5UM85F CSFBGA285
1.13 12/2/2016 BSM 52.2 KB
[BSDL] LFE5UM45 FCSFBGA285
1.13 12/2/2016 BSM 44 KB
[BSDL] LFE5U25F CSFBGA285
1.13 12/2/2016 BSM 39.5 KB
[BSDL] LAE5UM85F CABGA756
1.13 12/2/2016 BSM 80.8 KB
[BSDL] LFE5U85F CSFBGA285
1.13 12/2/2016 BSM 51.5 KB
[BSDL] LFE5UM85F CABGA554
1.13 12/2/2016 BSM 69.2 KB
[BSDL] LFE5U45F CABGA381
1.13 12/2/2016 BSM 51.2 KB
[BSDL] LFE5U85F CABGA756
1.13 12/2/2016 BSM 79.2 KB
[BSDL] LAE5UM45F CABGA554
1.13 12/2/2016 BSM 60.1 KB
[BSDL] LFE5UM25F CABGA381
1.13 12/2/2016 BSM 47.7 KB
[BSDL] LFE5U45F CSFBGA285
1.13 12/2/2016 BSM 43.3 KB
[BSDL] LFE5UM45F CABGA554
1.13 12/2/2016 BSM 60.1 KB
[BSDL] LFE5UM5G-85F CABGA381
1.0 7/16/2021 BSM 61.1 KB
[BSDL] LFE5UM5G-45F CABGA381
1.0 7/16/2021 BSM 52.8 KB
[BSDL] LFE5UM5G-85F CABGA756
1.0 7/16/2021 BSM 80.9 KB
[BSDL] LFE5UM5G-85F CABGA554
1.0 7/16/2021 BSM 69.2 KB
[BSDL] LFE5UM5G-45F CSFBGA285
1.0 7/16/2021 BSM 44 KB
[BSDL] LFE5UM5G-45F CABGA554
1.0 7/16/2021 BSM 60.1 KB
[BSDL] LFE5UM5G-25F CABGA381
1.0 7/16/2021 BSM 47.8 KB
[BSDL] LFE5UM5G-25F CSFBGA285
1.0 7/16/2021 BSM 40.2 KB
[BSDL] LFE5UM5G-85F CSFBGA285
1.0 7/16/2021 BSM 52.2 KB
[BSDL] LAE5UM45F CABGA381
1.13 12/2/2016 BSM 52.8 KB
[BSDL] LFE5U-25F TQFP144
FPGA-MD-02042 1.13 9/3/2021 BSM 34.9 KB
[BSDL] LFE5U-12F CABGA256
1.13 6/22/2018 BSM 43.3 KB
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MachXO5-NX Device Family Delphi Models
1.3 6/26/2024 ZIP 28.6 KB
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[IBIS] ECP5
2.8 8/19/2019 IBS 29.9 MB

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