The Mobile Industry Processor Interface (MIPI®) D-PHY was developed primarily to support camera and display interconnections in mobile devices, and it has become the industry’s primary high-speed PHY solution for these applications in smartphones. It is typically used in conjunction with MIPI Camera Serial Interface-2 (CSI-2) and MIPI Display Serial Interface (DSI) protocol specifications. MIPI D-PHY meets the demanding requirements of low power, low noise generation, and high noise immunity that mobile phone designs demand.
MIPI D-PHY is a practical PHY for typical camera and display applications. It is designed to replace traditional parallel bus based on LVCMOS or LVDS. Lattice’s submodule may be used for applications requiring a D-PHY receiver in the FPGA logic.