Lattice Sentry Root of Trust Reference Design for Mach-NX

Platform Firmware Resiliency Demo Reference Design for Lattice Sentry Solutions Stack

Lattice Mach-NX device is a new low-density FPGA with enhanced security features and on-chip dual boot flash. The enhanced bitstream security and user-mode security functions enable the Mach-NX device to be used as a Root-of-Trust hardware solution in a complex system. With Lattice Mach-NX device, you can implement a Platform Firmware Resiliency (PFR) solution in your system, as described in NIST Special Publication 800-193.

The design methodology of the Lattice Sentry PFR solution on the Mach-NX device using the Lattice Propel toolsets, which can largely reduce the design complexity

Protect - Mechanisms for ensuring that Platform Firmware code and critical data remain in a state of integrity and are protected from corruption, such as the process for ensuring the authenticity and integrity of firmware updates.

Detect - Mechanisms for detecting when Platform Firmware code and critical data have been corrupted, or otherwise changed from an authorized state.

Recover - Mechanisms for restoring Platform Firmware code and critical data to a state of integrity in the event that any such firmware code or critical data are detected to have been corrupted, or when forced to recover through an authorized mechanism. Recovery is limited to the ability to recover firmware code and critical data.

Features

  • RoT support the subsequent guidelines for Protection, Detection, and Recovery
  • Provide Image Authentication and Image Recovery
  • Monitor multiple SPI Flash/QSPI buses and protect for unauthorized activity and block unauthorized accesses using external quick switches
  • Provide Event Logging such as unauthorized flash accesses and notifies the BMC
  • Provide SMBus Filtering to monitor unauthorized activity and filter the unauthorized transactions
Lattice Sentry

Block Diagram

Documentation

技术资源
标题 编号 版本 日期 格式 文件大小
Lattice Propel 1.1 Root of Trust Reference Design User Guide
FPGA-RD-02243 1.1 3/26/2022 PDF 2.2 MB
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