The Lattice Single Wire Signal Aggregation Development Board is based on iCE40 UltraPlus™ FPGA chip but is designed to be easily portable to other iCE40 and Lattice FPGAs. The device is iCE40 UltraPlus SRAM-based FPGA with on-chip, one-time programmable NVCM (Non-Volatile Configuration Memory) to store configuration data. The SRAM memory cells are volatile, meaning that once power is removed from the device, its configuration is lost, and must be reloaded on the next power-up. This behavior has the advantage of being re-programmable in the field, which provides flexibility for products already deployed to the field, but it also requires that the configuration information be stored in a non-volatile device and loaded each time power is applied to the device.
The on-chip NVCM allows the device to configure instantly and enhances the design security by eliminating the need to use an external memory device. The configuration data can also be stored in an external SPI Flash from which the FPGA can configure itself upon power-up. This is useful for prototyping the FPGA or in situations where re-configurability is required. Additionally, the device can be configured by a processor in an embedded environment.
Connectors are the single highest contributor to system reliability. They also consume valuable PCB and system space, which is especially critical in hinged applications such as in notebooks. Single Wire Signal Aggregation allows you to reduce your connector and cable size while increasing your reliability
Single Wire Prototyping – Two boards are provided can be re-configured to interface to a prototype system to demonstrate the proof of concept in-system.
Supports Non-Volatile Configuration Memory – Provides the capability for iCE devices to perform in a stand-alone mode, essentially behaving like an ASIC. The NVCM is ideal for cost-sensitive, high-volume production applications, saving the cost and board space associated with an external configuration PROM.