The Lattice Semiconductor SubLVDS Image Sensor Receiver IP Core converts double data rate interface to pixel clock domain. The subLVDS interface is primarily used in image sensors. It has one clock pair and more than one data pairs. The number of data pairs varies, depending on bandwidth requirement.
Lower Common Mode Compared to LVDS Interface - Has lower common mode that is 0.9 V, while the common mode for LVDS is 1.25 V.
Lower Differential Swing Compared to LVDS Interface - Has lower differential swing that is ±150 mV, while the differential swing for LVDS is ±175 mV.
Source Synchronous Interface – Compared to LVDS Interface. the clock pair is running at the same rate as the data.