CSI-2/DSI D-PHY Transmitter

Convert Parallel Formatted Data Streams to MIPI CSI-2/DSI

Mobile Industry Processor Interface (MIPI®) D-PHY was developed primarily to support camera and display interconnections in mobile devices, and it has become the industry’s primary high-speed PHY solution for these applications in smartphones today. It is typically used in conjunction with MIPI Camera Serial Interface-2 (CSI-2) and MIPI Display Serial Interface (DSI) protocol specifications. MIPI D-PHY meets the demanding requirements of low-power, low noise generation, and high noise immunity that mobile phone designs demand. MIPI D-PHY is a practical PHY for typical camera and display applications.

Lattice’s CSI-2/DSI D-PHY Transmitter sub-module IP will help provide this conversion for Lattice CrossLink Family devices. This is useful for wearable, tablet, human machine interfacing, medical equipment and many other applications.

Features

  • Compliant with MIPI DSI v1.1, MIPI CSI-2 v1.1 and MIPI D-PHY v1.1 specifications
  • Supports MIPI DSI and MIPI CSI-2 interfacing up to 10 Gb/s
  • Supports 1, 2 or 4 MIPI D-PHY data lanes
  • Supports non-burst mode with sync events for transmission of DSI packets only
  • Supports LP (low power) mode during vertical and horizontal blanking

Block Diagram

Ordering Information

The CSI-2 DSI D-PHY Transmitter core is available for FREE for use in Diamond design software.

For Radiant design software, the CSI-2 DSI D-PHY Transmitter core must be purchased:

Family Part Numbers Description
CertusPro-NX DPHY-TX-CPNX-U Single-Design License
CertusPro-NX DPHY-TX-CPNX-UT Multi-Site License
CrossLink-NX DPHY-TX-CNX-U Single-Design License
CrossLink-NX DPHY-TX-CNX-UT Multi-Site License

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
CSI-2/DSI D-PHY Transmitter Submodule IP - Lattice Diamond Software
FPGA-IPUG-02024 1.6 5/14/2021 PDF 2.3 MB
CSI/DSI DPHY TX IP Core - Lattice Radiant Sofware
FPGA-IPUG-02080 1.7 9/27/2022 PDF 2 MB
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