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Latest Comms/Computing News from Lattice

Latest Comms/Computing News from Lattice
Posted 09/06/2019 by Lattice Semiconductor

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Low power Wireless HetNet Development

Wireless Heterogenous Networks (HetNet) promise designers attractive cost and power savings. But to meet aggressive BoM, power consumption and form factor requirements, they must partition the small cell designs with a combination of ASICs/ASSPs and FPGAs. Products like Lattice’s ECP5 and LatticeECP3 have offered a compact, SERDES-based connectivity solution for a wide range of protocols including CPRI and JESD204B. At the same time devices like Lattice’s MachXO2 and MachXO3 FPGAs are ideal for system control functions like reset generation, clock handling, I/O expansion and bridging, while products like Lattice’s Power Manager II and ASC support the use of a wide range of power supply options.

Simple Security Upgrade

Have you run out of key storage space in your TPM? Need to store cryptographic keys securely outside of your TPM? Here’s a simple solution. Upgrade your current MachXO3 CPLD with a pin-compatible MachXO3D CPLD device. Introduced in May, Lattice’s MachXO3D offers designers a new way to simplify the implementation of robust, comprehensive and flexible hardware-based security. Offering hardware root-of-trust capabilities, the MachXO3D builds on the proven MachXO3 architecture by adding embedded immutable security blocks, enhanced control functions and expanded user flash memory up to 2700 kbits. Moreover, it is pin-compatible with the popular MachXO3 devices used as a control PLD in compute systems. By upgrading to the MachXO3D designers can take advantage of its multiple on-chip read, write & erase protected flash sectors, which can be used to store system level keys securely. These keys can be used by the integrated cryptographic block within the device without exposing them. Alternately, they can be securely transmitted to the main processor when needed. Find out more about the MachXO3D here.

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