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Document

Lattice Radiant Software and IP Licensing Updates

FPD-RX-CNX-UT FPD-RX-XO5-US FPD-RX-XO5-UT FPD-RX-AVE-US FPD-RX-AVE-UT FPD-RX-AVG-US FPD-RX-AVX-US FPD-RX-AVG-UT FPD-RX-AVX-UT Avant Certus-N2 FPD-Link Transmitter FPD-TX-AVG-US FPD-TX-AVX-US FPD-TX-AVG-UT FPD-TX-AVX-UT FPD-RX-CN2-US FPD-RX-CN2-UT FPD-TX-CTNX-UT FPD-TX-CPNX-UT…

Document

MachXO Mini Development Kit Product Brief

MachXO Mini Eval Board Block Diagram MachXO Mini Evaluation Board LED Bank I 2 C Temperature Sensor SPI Flash Memory (2Mbit) SRAM Memory (1Mbit) Switch Bank WISHBONE Bus SPI Memory Controller I 2 C Master LatticeMico 8 UART SRAM Memory Controller Lattice MachXO PLD PC Host JTAG/USB RS-232/USB MachXO…

Document

REACH Compliance Letter

BB 103 Lead titanium zirconium oxide 12626-81-2 12/19/2012 104 Silicic acid, lead salt 11120-22-2 12/19/2012 105 Silicic acid (H2Si2O5), barium salt (1:1), lead-doped [with lead (Pb) content above the applicable generic concentration limit for 'toxicity for reproduction' Repr. 1A (CLP) or…

Document

Military Program Overview

D 100% Post Burn-In Electrical Applicable Device 100% Specification Tc = 25°C PDA = 5% Final Electrical Test Applicable Device 100% Specification Tc = 125°C Final Electrical Test Applicable Device 100% Specification Tc = - 55°C Final Electrical Test Applicable Device 100% Specification Tc = 25°C…

Document

Helion Image Dignal Processing IP Datasheet

Data Sheet 1.0 PDF 7.5MB

FAQ

The Lattice SC/M data sheet (DS1005) refers Fibre Channel users to the XAUI section of the data sheet. What is the relationship between Fibre Channel and XAUI modes of operation in the Lattice SC/M de

The 10 Gb Fibre Channel specification at the PCS and physical layers is identical to the 10 GbE/XAUI protocol. This is why the LatticeSC/M XAUI/10 GbE PCS mode is identical to the 10 Gb Fibre Channel mode and why the XAUI/10 GbE mode of the PCS will also work for 10 Gb Fibre Channel applications.

IP Core

SPI 4.2 MACO Core

Archived IP Core supporting LatticeSC/M FPGAs - For reference only.

IP Core

Soft Error Detection

Archived IP Core supporting LatticeSC/M FPGAs - For reference only.

IP Core

DDR/DDR2 SDRAM Controller MACO Core

Archived IP supporting LatticeSC/M FPGA Families - for reference only.

IP Core

Ethernet 1G/10G flexiMAC MACO Core

Archived IP supporting LatticeSC/M FPGA Families - for reference only.

IP Core

RLDRAM Controller MACO Core

Archived IP supporting LatticeSC/M FPGA Families - for reference only.

IP Core

QDRII + SRAM Controller MACO Core

Archived IP supporting LatticeSC/M FPGA Families - for reference only.

IP Core

2.5Gb Ethernet MAC

Archived IP Core supporting the LatticeSC/M FPGA family.

IP Core

Block Viterbi Decoder

Archived IP Core supporting LatticeECP2/M, LatticeXP2 and LatticeECP3 FPGAs - For reference only

IP Core

Modular Peripheral Sideband Tunneling Interface (M-PESTI) IP core

​​The Lattice M-PESTI IP core provides early peripheral presence detection and attribute collection before system boot up.​

Document

LatticeECP2 Advanced Evaluation Board User's Guide

User Manual EB23 01.6 PDF 2.0MB

Board

LatticeSC SFI-5 Evaluation Board

No longer available - for reference only. For evaluation of the LatticeSC/M FPGA in SFI-5 applications (LFSCM3GA80E-6FF1704C) + SERDES/FPGA framer SFI-5.

Board

LatticeSC PCI Express x1 Evaluation Board

No longer available - for reference only. General purpose evaluation platform for the LatticeSC/M FPGA (LFSCM3GA25E-6F900C) + x1 PCIe edge + SATA Host/Target.

Board

LatticeSC PCI Express x4 and x8 Evaluation Boards

No longer available - for reference only. General purpose evaluation platform for the LatticeSC/M FPGA (LFSCM3GA80E-6FF1152C) + x4 PCI Express edge

Board

LatticeSC Communications Evaluation Board

No longer available - for reference only. General purpose evaluation platform for the LatticeSC/M FPGA (LFSCM3GA25E-6F900C) + 300-pin MSA transponder.