SLVS-EC to MIPI CSI-2 with CertusPro-NX

Bridging Interconnections in Mobile Devices with SLVS-EC Protocol specification v2.0

The Mobile Industry Processor Interface (MIPI®) D-PHY developed was primarily to support camera and display interconnections in mobile devices, and it has become the industry’s primary high-speed PHY solution for these applications in smartphones. It is used in conjunction with MIPI Camera Serial Interface-2 (CSI-2) and MIPI Display Serial Interface (DSI) protocol specifications. It meets the demanding requirements of low power, low noise generation, and high noise immunity that mobile phone designs demand.

The Lattice Semiconductor SLVS-EC to MIPI D-PHY Interface reference design provides this conversion for Lattice Semiconductor CertusPro™-NX devices. This is useful for wearable, tablet, human machine interfacing, medical equipment and many other applications

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SLVS-EC to MIPI reference design - allows the quick interface to receive serial data from CMOS Image Sensors and convert the incoming serial data to MIPI CSI-2 data format.

Design and File Modification - This reference design developed is using version 1.2.0 of the SLVS EC IP, on version 1.4.0 of the Pixel2Byte IP and version 1.4.0 of the TX D-PHY IP. Some modifications are required depending on user configuration.

Bandwidth - MIPI D-PHY also has a maximum of 5 lanes per channel. It consists of one clock lane and up to 4 data lanes. The maximum D-PHY data rate per lane is 1.5 Gb/s by TX Soft D-PHY IP.

Data Ordering and Data Types - The highest bit within a data bus is the most significant bit. 10-bit parallel data is serialized to 1-bit data stream on each MIPI D-PHY data lane where bit 0 is the first transmitted bit.

Features

  • Compliant with MIPI D-PHY v1.2, and MIPI CSI-2 v1.2 Specifications
  • Supports MIPI CSI-2 interfacing up to 5 Gb/s for SLVS-EC and 6 Gb/s for Soft TX D-PHY
  • Supports 1, 2, 4, 6 or 8 RX data lanes
  • Supports 1, 2, or 4 MIPI TX D-PHY data lanes
  • Supports low-power (LP) mode during vertical and horizontal blanking
Lattice mVision Solutions Stack

Block Diagram

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
SLVS-EC to MIPI CSI-2 with CertusPro-NX - Source Code
1.0 3/15/2022 ZIP 110.7 MB
SLVS-EC to MIPI CSI-2 with CertusPro-NX - Documentation
FPGA-RD-02251 1.0 3/15/2022 PDF 745.7 KB

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