The Lattice DisplayPort IP Core is designed for transmission and reception of serial-digital video for consumer and professional displays. This IP helps users implement DisplayPort video interface as defined by VESA DisplayPort specifications. DisplayPort is a high-speed serial interface standard supported by industry leaders in Consumer electronics, Industrial and Automotive. This protocol is considered a successor to VGA and DVI standards with support for video resolutions up to 8Kx4K video and adds audio.
DisplayPort IP Core supports Lattice Nexus Series FPGAs and later versions of Lattice FPGA family.
Dynamic and Parameterized Lanes Support – Implements a receiver and transmitter per lane with 1, 2 and 4 lanes (parameterized for RX and dynamic for TX) at 1.62, 2.7, 5.4 and 8.1 Gbps.
AXI4-Lite and AXI4-Stream Support – This IP supports commonly used standard interfaces for configuration and video data such as AXI4-Lite and AXI4-Stream respectively. It helps user to easily plug-in IP in existing/upcoming system.