Platform Manager

Centralize control functions with scalable power management

Revolutionary power management architecture – Easily manage up to 36 rails using distributed power sense and centralized controls. Slash time to market and debug time through fault logging.

Change your algorithm, not your board – Instead of reworking your PCB, simply reprogram your Platform Manager device to quickly handle design changes.

Don’t throttle the silicon – Platform Manager’s precision voltage scaling and VID features enable easy control of complex, power-hungry ASICs and SoCs.

Features

  • Centralized power-up/down sequencing control and power supply sensing
  • Lower chip power dissipation using voltage scaling / VID
  • Precision voltage control (<10 mV accuracy) with closed-loop trimming
  • Capture voltage faults (primary cause) within 100 µs with 0.2% (typ) accuracy and store in on-chip flash
  • Quickly modify monitoring thresholds, sequence or timing… even when the system is in the field

Jump to

Family Table

Platform Manager Device Selector Guide

Parameters LPTM10-1247 LPTM10-12107
Analog Inputs - Single-Ended 5 0
Analog Inputs - Differential 7 12
Total Analog Inputs 12 12
Dedicated Open Drain Outputs 12 12
Dedicated Digital Inputs 4 4
Digital I/O 31 91
Total Digital I/O 47 107
Margin and Trim 6 8
MOSFET Driver Outputs 4 4
CPLD MacroCells 48 48
FPGA - LUT-s 640 640
Package 128-pin TQFP 208-ball ftBGA

Example Solutions

Reduce power and system operating cost by dynamically controlling power dissipation device by device.

  • Dynamic Power Dissipation Control through VID reduces the power consumption of ASICs and processors by more than 30%
  • Improve performance and add functionality to your board without increasing power requirements by controlling voltage using a simple code.
  • Eliminate the need for microcontroller and software to configure DC-to-DC converters.

Enhance board reliability and decrease debug time using robust fault logging.

  • Non Volatile Memory with Time Stamping lets you quickly pinpoint the primary fault even in complex systems with large numbers of supplies.
  • Log all faults as soon as they occur and capture the status of all power supplies. And reliably store the image directly in a flash memory.
  • Capture the primary cause of the board failure – make it possible to easily link flash corruption to a power failure

Reduce field maintenance costs through in-system programmable power management.

  • Reliably change power sequencing algorithms in the field while the system is running, using in-system programmability.
  • Back-up golden Image ensures fail-safe update of power management algorithms.
  • Eliminate the need to send out technicians for field upgrades.

Accurately adjust for brown-outs by quickly switching to back-up power in less than 16µs

  • Maintain power to small cells during brown-out
  • Ride through brown-out periods by automatically switching to a back up through fast, accurate voltage monitoring.

Reduce system cost by implementing reliable hot-swap using lowest cost MOSFETs

  • Implement reliable, high-power hot-swap controller without using expensive big MOSFETs
  • Reduce the total number of MOSFETs required – and use smaller low-cost, conventional MOSFETs

Save development time and effort by reusing a single-chip, scalable power management solution.

  • Enables scalability as the system bandwidth and power requirements grow from 12 to 36 rails in one chip.
  • Simplify power management design process by eliminating the need for partitioning the sequencing algorithms
  • Fine tune supply sequencing enabling reliable board power-up

Design Resources

Intellectual Property & Reference Designs

Simplify your design efforts by using pre-tested, reusable functions

Application Notes

Learn how to get the most from our line-up of FPGAs / development boards

Software

Complete Design Flows, High Ease of Use

Development Kits & Boards

Our development boards & kits help streamline your design process

Programming Hardware

Take the strain out of in-system programming & in-circuit reconfiguration with our programming hardware

Documentation

Quick Reference
Technical Resources
Information Resources
Downloads
TITLE NUMBER VERSION DATE FORMAT SIZE
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN6056 01.1 4/17/2008 PDF 216.1 KB
Creating Platform Manager Designs with PAC-Designer and Lattice Diamond Software
TN1259 01.0 3/4/2013 PDF 4.9 MB
Extending the VMON Input Range of Power/Platform Management Devices
AN6041 2.4 3/1/2016 PDF 1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT6088 1.2 6/6/2012 ZIP 591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN6088 01.2 6/6/2012 PDF 1.1 MB
High-side Current Sensing Techniques for Power Manager Devices
AN6049 01.1 4/17/2008 PDF 70.9 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN6042 01.2 10/7/2011 PDF 277 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015 PDF 3.1 MB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN6067 01.0 11/21/2005 PDF 563.7 KB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN6051 02.1 4/17/2008 PDF 67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN6076 01.0 12/12/2007 PDF 215.9 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN6075 01.1 4/11/2011 PDF 190.4 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN6073 01.1 4/21/2011 PDF 171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN6078 01.1 4/21/2011 PDF 1.3 MB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN6082 01.1 4/21/2011 PDF 1.1 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN6069 01.0 11/21/2005 PDF 259.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN6068 01.1 2/28/2011 PDF 245.8 KB
Scalable Centralized Power Management Source Files
DT6089 1.2 6/6/2012 ZIP 520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN6089 01.2 6/6/2012 PDF 1.1 MB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN6077 1.1 10/8/2014 PDF 676.8 KB
Using PAC-Designer's Power Manager Waveform Editor
AN6054 01.0 11/23/2005 PDF 276.3 KB
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017 PDF 734.6 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN6070 01.0 11/21/2005 PDF 540.1 KB