PCI Express for Avant and Nexus 2 FPGAs

Flexible, High-Performance, Easy-to-use Transaction Layer Interface to the PCI Express Bus

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The Lattice PCIe x8 IP Core provides a flexible, high-performance, easy-to-use Transaction Layer Interface to the PCI Express Bus. The Lattice PCIe x8 IP Core implementation is a hardened IP with soft logic provided for interface conversion options. The hardened IP is an integration of PHY and Link Layer blocks.

Resource Utilization details are available in the IP Core User Guide.

The Hard IP PHY key features include:

  • Aggregation and bifurcation up to x4 lanes and x8 lanes PHY configuration
  • Data rates of 2.5 Gbps, 5.0 Gbps, 8.0 Gbps, and 16.0 Gbps
  • Selectable parallel data widths such as 8, 16, 32, 64
  • 8b/10b encoding at 2.5 Gbps and 5 Gbps, and 128b/130b encoding at 8 Gbps and 16 Gbps

The Hard IP Link Layer key features include:

  • PCI Express Base Specification Revision 4.0 compliant including compliance with earlier PCI Express Specifications.
  • Backward compatible with PCI Express 3.x, 2.x, 1.x
  • Backward compatible with PCI Express 3.x, 2.x, 1.x x8 PCI Express Lanes with support for bifurcation. Supported lane configurations:
    • Radiant 2023.2 – 1 × 4, 1 × 2, 1 × 1
    • Radiant 2024.1 and future Radiant releases – 1 × 8, 1 × 4, 1 × 2, 1 × 1
  • 16.0GT/s, 8.0GT/s, 5.0 GT/s, and 2.5 GT/s line rate support

Soft IP key features include:

  • TLP Data Interface
  • AXI4-Stream Data Interface Option
  • LMMI Register Interfaces
  • AXI-L Register Interface

Jump to

Block Diagram

IP PCle x8 - Block DiagramExpand Image

Ordering Information

The PCIe x8 IP is available with the Lattice Radiant Subscription software. To purchase the Lattice Radiant Subscription license, contact Lattice Sales or go to the Lattice Online Store.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Avant and Nexus Linux PCIe Host Non-DMA Driver User Guide
FPGA-TN-02424 1.0 12/11/2025 PDF 1.8 MB
TITLE NUMBER VERSION DATE FORMAT SIZE
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PCIe x8 IP Core - User Guide
FPGA-IPUG-02243 1.7 4/6/2026 PDF 6.7 MB
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PCIe x8 IP Core - Release Notes
FPGA-RN-02061 1.5 4/6/2026 PDF 329.5 KB

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