PCI Express Endpoint Core

Endpoint Solution from SERDES Interface to Transaction Layer

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PCI Express is a high performance, fully scalable, well-defined standard for a wide variety of computing and communications platforms. It has been defined to provide software compatibility with existing PCI drivers and operating systems.

Resource Utilization details are available in the IP Core User Guide.

Features

  • PHY Layer
    • 2.5 Gb/s or 5.0 Gb/s CML electrical interface.
    • PCI Express 2.0 electrical compliance.
    • Serialization and de-serialization.
    • 8b10b symbol encoding/decoding.
    • Data scrambling and de-scrambling.

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Block Diagram

PCI Express x1, x2, x4 Endpoint CoreExpand Image

Performance and Size

PCI Express IP Configuration

x4 Native X1 Native X2 Downgraded
FPGA Families Supported LatticeECP3 and ECP5
Targeted Device LFE3 LFE5UM LFE3-95E LFE5UM LFE3-95E LFE5UM
Data Path Width (Core Data Width)
 64 64 16 16 64 64
LUTs 12200 13900 6040 6207 12900 12200
sysMEMTM EBRs 11 11 4 4 11 11
Registers 9746 9763 4027 4188 8899 9746
PCI Express 5G IP Configuration

x2 Native X1 Downgraded
FPGA Families Supported Lattice ECP5-5G
Targeted Device LFE5UM5G LFE5UM5G
Data Path Width (Core Data Width)
 64 64
LUTs 15673 13893
sysMEMTM EBRs 7 7
Registers 11249
 9660

Ordering Information

  Part Number
Device Family Multi-site Perpetual Single Seat Annual
ECP5 PCI-EXP4-E5-UT
PCI-EXP1-E5-UT		 PCI-EXP4-E5-US
PCI-EXP1-E5-US
ECP5-5G PCI-EXP2-E5G-UT PCI-EXP2-E5G-US
LatticeECP3 PCI-EXP4-E3-UT3
PCI-EXP1-E3-UT3		 PCI-EXP4-E3-US
PCI-EXP1-E3-US
LatticeECP2M PCI-EXP4-PM-UT3 -

OPN Reference Guide

PCI-EXP4: covers x1, x2 and x4
PCI-EXP2: covers x1 and x2

Evaluate: To download a full evaluation version of this IP, go to the IP Server in Lattice Radiant. This IP core supports Lattice’s IP hardware evaluation capability, which makes it possible to generate the IP core and operate in hardware for a limited time (approximately four hours) without requiring an IP license.

To find out how to purchase the PCI Express Endpoint IP core, please contact your local Lattice Sales Office.

Documentation

Quick Reference
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.2 1/24/2022 PDF 918.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
ECP5 and ECP5-5G PCI Express Soft IP Ease of Use Guidelines
FPGA-TN-02045 1.2 1/24/2022 PDF 918.9 KB
TITLE NUMBER VERSION DATE FORMAT SIZE
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PCI Express x1/x2/x4 Endpoint IP Core - User Guide
FPGA-IPUG-02009 2.2 4/9/2025 PDF 2.1 MB

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