Soft I2C Master and Slave – Simple Write and Read

Simple demonstration implementing Lattice I2C Reference Designs to do write and read

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Basic I2C Demonstration This demonstration implements an I2C Bus Master in a Lattice MachXO3, communicating with an I2C Slave Peripheral in an iCE40 UltraPlus.

Based on Lattice Reference Designs This demonstration utilizes the Lattice Soft I2C Bus Master and Soft I2C Slave Peripheral Reference Designs, available for download separately – including full source code and documentation.

Configure to match your system’s needs. Use this Demonstration as an example to implement I2C in your FPGA design.

Features

  • Includes source files, and documentation
  • Uses the MachXO3-9400 Development Board (LCMXO3LF-9400C-ASC-B-EVN) and iCE40 UltraPlus Breakout Board (ICE40UP5K-B-EVN)

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Soft I2C Master and Slave - Simple Write and Read Block Diagram

Documentation

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TITLE NUMBER VERSION DATE FORMAT SIZE
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Soft I2C Master and Slave Simple Write-Read Demo - Documentation
FPGA-UG-02122 1.0 2/2/2021 ZIP 1.9 MB
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Soft I2C Master and Slave Simple Write-Read Demo - Source Code
FPGA-UG-02122 1.0 2/3/2021 ZIP 1.9 MB

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