Addressing Design Complexity in System Control Architecture

The COVID-19 pandemic disrupted industries and economies across the globe, pushing a large portion of formerly office-based workforces into remote-work setups. A large segment of the workforce becoming decentralized put immense pressure on servers, datacenters, networks, and communication systems, at large.

In America, for example, 71% of workers doing their jobs from home all or most of the time put a strain on connectivity and created a more reliance on services in the cloud, as well as 5G and LTE infrastructures for day-to-day computing. Current research from management consulting firm McKinsey found that, after the pandemic, “20 to 25 percent of the workforces in advanced economies could work from home between three and five days a week,” which makes up about four to five times more remote work than before the pandemic. The research suggests that this could lead to “a large change in the geography of work, as individuals and companies shift out of large cities into suburbs and small cities.”

Such a shift has significant implications for the future of the technology infrastructures responsible for carrying data to-and-from this more widely distributed geographical model. Multifunctional cloud service companies with hyperscale datacenters are being forced to rapidly expand capabilities to meet demands of the new, more complex system control architecture and computing needs. This complexity and the related increasing demands require simplified system design and integration with secure and reliable devices.

Lattice’s latest control FPGA, Lattice MachXO5™-NX, is an ideal low power solution for the increasing compute demands on today’s control architectures. Built on the Lattice Nexus™ platform, MachXO5-NX devices expand the capabilities of the popular Lattice MachXO FPGA family with class-leading power efficiency and reliability, offering increased logic and memory resources, robust programmable I/O, and class-leading security features.

Addressing System Control Architecture Needs

Lattice MachXO5-NX provides system control architecture and board control and management while simplifying both integration and overall system design. MachXO5-NX also provides instant-on functionality with boot-up speeds of approximately 15 milliseconds, significantly reducing system vulnerability during boot-up. Additionally, integrated flash memory and a secure on-chip multi-boot configuration engine means Lattice MachXO5-NX remains secure and reliable as well as re-programmable and easy to update.

Offering Increased Resources with Better Memory

Optimized for monitoring and control management, Lattice MachXO5-NX FPGAs include up to 25k logic cell density and added DSP blocks in comparison with earlier generation control FPGAs. Compared to similar FPGAs with comparable density, MachXO5-NX offers up to 2.9 times the embedded memory, up to 36 times the dedicated user flash memory storage addressing the design complexity trends.

Bridging with Modern CPUs

Modern CPUs are powerful because they are built using the most leading-edge process technology that drives the I/O voltages lower. However, other components, using 3.3 V I/O signaling on the motherboard, continue to remain on larger process geometry for cost and performance reasons. This leads to a disconnect between modern CPUs and other components. Lattice MachXO5-NX supports I/O ranges from 1.0 V to 3.3 V that bridge other components such as CMOS, fan control, sensors, and switches to modern CPUs. Lattice secure control FPGAs will remain an important system control device for years to come.

Providing More Robust Security

Security is an increasingly important aspect of any system design as the security threat landscape continues to evolve. The MachXO5-NX comes with AES256 bitstream encryption and ECC256 bitstream authentication to protect the integrity of system designs. The security engine is also available during run-time to protect any data exchange between the system and the FPGA.

Enabling Better Efficiency, Higher Reliability

Semiconductor process nodes are getting smaller and smaller, so they can pack more designs into the same die area. More resources without power consideration mean greater potential for problems such as increased power consumption and heat dissipation. Lattice MachXO5-NX is built on the Lattice Nexus Platform, which provides 70% lower power and 100 times lower soft error rate compared to competitive FPGAs of a similar class.

Lattice MachXO5-NX FPGAs are yet another example of Lattice’s continued investment in the secure control FPGA market to enhance system monitoring and control.

To learn more about how Lattice FPGA control functions provide simplified system design requirements for datacenter servers, read our latest whitepaper on DC-SCM Implementation in Lattice FPGA.

To learn more about Lattice MachXO5-NX FPGAs, visit www.latticesemi.com/MachXO5-NX