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CrossLinkPlus: Embedded Vision at Flash Speed

CrossLinkPlus: Embedded Vision at Flash Speed
Posted 09/30/2019 by Peiju Chiang

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As embedded vision continues to grow in popularity across market segments, there are three trends around embedded vision system development that OEMs need to address.

First, consumer devices have set the standard for the visual experience users expect from their displays. Displays on tablets and smartphones power on quickly without any glitches or visual artifacts flashing on the screen. Embedded vision designers are looking to deliver that same experience on the embedded displays used in automotive or industrial applications.

Second, the mobile market has driven the growth of the MIPI ecosystem. MIPI, a popular interface specification used in mobile devices, is now the dominant I/O standard for many system components, including image sensors, displays, and application processors (APs). The popularity of MIPI has fostered economies of scale for the MIPI component manufacturing ecosystem. The ready availability and competitive pricing of MIPI components is fostering their use in embedded vision system designs, though many embedded systems require ongoing support for legacy interface standards that are incompatible with MIPI.

Last, OEMs need to support increasingly sophisticated embedded vision applications in order to differentiate themselves from the competition. These systems often require multiple image sensors. Finding a way to connect those sensors to APs, which have a finite number of available I/Os ports, can greatly increase system complexity, design time and cost.

So we’re excited today to announce our new CrossLinkPlus family of small form factor, low power FPGAs for enabling innovative, low power, and high performance embedded vision systems. CrossLinkPlus offers several features designed to address the trends discussed above, including integrated flash memory, a hardened MIPI D-PHY and programmable high-speed I/O ports. Let’s take a look at each of these features and how they facilitate embedded vision system design.

CrossLinkPlus Block Diagram

First, the 2 Mb embedded flash memory accelerates device configuration to deliver the seamless visual experience users expect. Using embedded flash as configuration memory, CrossLinkPlus enables a display to boot in less than 10 milliseconds. As the human eye can’t detect an image in less than 15 milliseconds, any display artifacts or glitches at boot is invisible to the human eye. The flash also enables flexible device reprogramming in the field.

To facilitate use of MIPI ecosystem components, CrossLinkPlus ships with two hardened MIPI D-PHY IP blocks. These blocks can support two MIPI D-PHY ports at a combined speed of 12 Gbps, plenty of bandwidth to support multiple MIPI connections. CrossLinkPlus also supports up to 11 lanes of programmable I/Os so the device can be configured to bridge connections between MIPI and non-MIPI interfaces (Sub-LVDS, LVDS, CMOS, SLVS200, etc.).

Additionally, Lattice provides ready-to-use IPs and reference designs to accelerate implementation of CrossLinkPlus FPGAs in common embedded system architectures used in industrial, automotive, computing, and consumer products. These architectures including sensor and display bridging, aggregation, and signal splitting. By leveraging CrossLinkPlus FPGAs and its hardware and software tools (a complete list of both are available on the CrossLinkPlus product page), designers avoid much of the work around enabling basic connectivity between embedded vision system components. Reducing that engineering burden gives CrossLinkPlus users more time to focus their resources on creating value-added features that differentiate their products from the competition.

CrossLinkPlus System Architectures

To better illustrate how each of the system architectures above can be used in actual devices, below are several applications block diagrams highlighting where CrossLinkPlus is used to either aggregate multiple sensors or bridge connections between MIPI and non-MIPI components. In each of these applications, CrossLinkPlus provides the high bandwidth component connection and supplemental processing power needed for converting and handling of data in advanced embedded and smart vision applications.

CrossLinkPlus Applications Block Diagram

In the industrial machine vision application, CrossLinkPlus serves as a sensor bridge between a Sub-LVDS image sensor and a machine vision processor with a MIPI D-PHY interface. In the AR/VR application, CrossLinkPlus aggregates signals from the multiple sensors used in the headset to just one stream before connecting to the processor (conserving I/Os is critical in small form factor designs like AR headsets). For automotive and other safety critical applications, CrossLinkPlus duplicates sensor data to send it to multiple destinations (in this case a processor and a backup data log). Finally, CrossLinkPlus lets an industrial device using a legacy display by converting the processor’s MIPI DSI output to an older I/O standard, OpenLDI.

For more information about CrossLinkPlus, including a listing of all available software, IP and reference design options, please visit the CrossLinkPlus product page.

In closing, I’d also like to acknowledge the CrossLinkPlus engineering and product management teams. When we first mentioned the CrossLinkPlus product concept back in May 2019 at our Financial Analyst Day, we forecasted the device would be sampling in Q4 2019. But thanks to a lot of hard work and focus, CrossLinkPlus is available now in September and ahead of schedule.

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