Form Follows Function – Selecting the Best Lattice FPGA

“Whether it be the sweeping eagle in flight, or the open apple blossom, the toiling work horse, the blithe swan, the branching oak, the winding stream at its base, the drifting clouds, over all the coursing sun, form ever follows function.” Sullivan, Louis H, 1896

You may be asking yourself, “What does a nineteenth century architect have to do with FPGAs?” A key decision facing many system architects is which FPGA families to use in their next project. Lattice currently offers four classes of FPGAs: iCE, ECP, Mach and CrossLink. It is often tempting to think of FPGAs as just a blank canvas, ready to be filled with digital logic. After all, this flexibility is why we love them. However, the functions the Lattice FPGA architects had in mind when they created each class also had shaped their form. Understanding this initial intent can be helpful when choosing the right FPGA family for your next project.

Almost any circuit board measuring 1 foot x 1 foot (30cm x 30cm) or greater, as well as many smaller ones, require a chip that manages the reset signals, hardware status and miscellaneous interface issues. Frequently, this function is done by a small FPGA that the developers refer to as the Control PLD. This function has been squarely in the minds of the Mach architects over several device generations. Three main capabilities of the latest generation, the MachXO3 family, are at the center of providing this critical control function. First, the ability to be the “first device on” at system power up and the “last device off” at system power down. Second, the availability of a large number of I/Os at low-cost to allow connection with as many devices and interfaces as necessary. Third, the provision of robust I/Os that don’t glitch during power cycles and can be driven while the device is unpowered.

In emerging markets, it is common for developers to use FPGAs to implement functions that are expected to evolve during development or even after product deployment. Over the last 10 years, there has been a trend to move from implementing these functions as 100% FPGA, to using an ASIC or ASSP along with a Companion FPGA. The ECP5 family of devices was architected with this companion function in mind. The devices provide essential system interfaces, such as PCIe and DDR, to allow system interconnection, and the FPGA fabric was designed from the ground up for optimized cost and power. In addition, the small die area allows for industry-leading combinations of FPGA capacity and package size.

Traditionally, designers have considered FPGAs as too expensive, power hungry and physically large to be used in consumer products. The architects of the iCE devices set out to break this paradigm and created a Mobile FPGA suitable for use in today’s consumer mobile and edge products. With package sizes as low as 1.4mm x 1.4mm, pricing suitable for high-volume production, and power ranges into the tens of uW, iCE40 UltraPlus FPGAs enable connectivity, real-time offload and compute offload in many leading smart phones, smart speakers and other consumer mobile and consumer edge devices.

Of course many designers find FPGA use cases that differ from the original intent of the chip architects – a fact that we both, encourage and embrace. The genesis of our CrossLink family is a great example of this. We have noticed that with the widespread adoption of mobile consumer devices, an increasing number of Lattice customers started using MachXO2 and its big brother the LatticeXP2 to implement image interfaces such as MIPI CSI, MIPI DSI and LVDS based Flat Panel Display. The CrossLink family, a Video Bridging FPGA was created to allow designers to more efficiently implement these common functions.

So if you are looking to select a Lattice FPGA for your next project and you are not sure which one is right, remember that form follows function. Hopefully the insights regarding the functions intended by the chip architects can guide you in your device selection, but feel free to also break away from these original functions, if it makes sense. Perhaps you will be charting the course for a next generation of devices.