Power Manager II

为具备前瞻思维的工程师提供集成的电路板功耗管理功能

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不费力气的电源控制——采用Power Manager，您可以监控多达12个电源，具有无与伦比的精度和速度，故障响应时间<65 μs，防止电路板上的闪存出错。

降低BOM成本——管理电路板上电源的最简单方式—Power Manager II集成热插拔控制器、电源OR’ing、定序、电压监控、复位发生、微调、裕度等功能。

方便设计——PAC-Designer软件支持Power Manager II产品系列，提供设计方便性，用户可使用基于PC的软件在写入器件前对电源定序和监控电路进行验证。

特性

  • 多达12个差分电压传感器，带有接地层噪声免疫
  • 准确度在1%内的电压微调
  • 可靠的CPLD带有高达48个宏单元，可作为定序和监控信号逻辑
  • 工作电压范围大（3.3 V + 20%至3.3 V -15%）
  • 多达4个高压MOSFET驱动器输出
  • 使用10位ADC通过I2C进行电压测量
  • 多达8个片上DAC，用于裕度和微调

立即跳转到

产品系列表

Power Manager II 应用检索指南
  ProcessorPM POWR607 POWR1014 POWR1014A POWR1220AT8
电路板输入（主）电源管理热插拔
-48V 热插拔   Check Mark      
+12/24V 热插拔   Check Mark Check Mark Check Mark Check Mark
给外部系统供电
-48V 供电   Check Mark      
+12/24V 供电   Check Mark Check Mark Check Mark Check Mark
冗余电源选择
-48V 电源O R'ing   Check Mark      
+12/24V 电源O R'ing   Check Mark Check Mark Check Mark Check Mark
负载（次）电源管理
电源定序   Check Mark Check Mark Check Mark Check Mark
电压监控 Check Mark Check Mark Check Mark Check Mark Check Mark
复位发生 Check Mark Check Mark Check Mark Check Mark Check Mark
看门狗定时器 Check Mark Check Mark Check Mark Check Mark Check Mark
使用ADC的电压测量       Check Mark Check Mark
电源电压微调         Check Mark
电源电压裕度         Check Mark

莱迪思车用（AEC-Q100认证）ispPAC-POWR1014/A器件选型指南

  LA-POWR1014 LA-POWR1014A
模拟输入引脚 10 10
可编程比较器 20 20
每个输入的触发点 368 368
可监测的最低电压 0.7V 0.7V
掉电侦测 75mV 75mV
CPLD宏单元 24 24
输出 14 14
FET驱动器 2 2
ADC分辨率 - 10位
I2C支持 - 是
工作电压 2.8V至3.9V 2.8V至3.9V
封装
 48-Pin TQFP 48-Pin TQFP

解决方案实例

莱迪思的Power Manager系列产品提供了灵活的可编程解决方案，整合了多种板级电源和数字化管理功能。

通过准确地监测多达12个电压，避免闪存出错

  • 高精度的模拟故障检测电路与数字控制逻辑（PLD）被集成在单个芯片中
  • 监控多达12个电压准确地监测故障，快速的触发警报和控制电路板的工作。
  • 通过准确地监控所有的处理器电源电压防止闪存出错。在少于16μs的时间对故障做出响应使处理器复位。

重复使用单芯片，可扩展的电源管理解决方案，节省开发时间和精力。

  • 根据系统的大小和电源需求，使用一块芯片可管理4至12个电源，从而实现了可扩展性。
  • 微调电源定序而无需修改电路板，能够可靠的启动电路板
  • 在软件中简单的点击即可模拟不同的故障情况的效果

使用最低成本的MOSFET实现可靠的热插拔，从而降低系统成本

  • 实现可靠，大功率的热插拔控制器，无需使用昂贵的大型MOSFET
  • 减少所需MOSFET的总数 - 使用较小的低成本，传统的MOSFET

通过整合复位发生器、电压监控、看门狗定时器至单个Power Manager器件，降低50％的成本。

  • 用单个Power Manager器件取代多个单功能的集成电路和分立器件 - 显著减少了电路板空间和成本。

用小于16μs的时间快速切换到后备电源，针对掉电的情况准确地做出调整

  • 掉电期间用小的电池保持电源供电
  • 通过快速，精确的电压监控，掉电期间自动切换到备份电源。

设计资源

IP和参考设计

使用经过预先测试、可重复使用的功能简化您的设计工作

应用说明

了解如何最高效地使用我们一系列的FPGA和开发板

软件

覆盖整个设计流程，非常易于使用

开发套件和开发板

我们的开发板和开发套件能够简化您的设计流程

编程硬件

使用我们的编程硬件，轻松完成在系统编程和在线重配置

文档

快速参考
技术资源
资讯资源
下载
标题 编号 版本 日期 格式 文件大小
选择全部
ispPAC-POWR1014/A Data Sheet
FPGA-DS-02089 2.3 11/20/2020 PDF 4.7 MB
High-side Current Sensing Techniques for Power Manager Devices
AN6049 01.1 4/17/2008 PDF 70.9 KB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-02031 2.5 9/21/2021 PDF 1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT6088 1.2 6/6/2012 ZIP 591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN6088 01.2 6/6/2012 PDF 1.1 MB
ispPAC-POWR1220AT8 Evaluation Board
AN6065 01.2 3/1/2007 PDF 305.3 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015 PDF 3.1 MB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN6067 01.0 11/21/2005 PDF 563.7 KB
Interfacing Power Manager Devices with Modular DC-to-DC Converters
AN6046 01.1 4/17/2008 PDF 494.6 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN6042 01.2 10/7/2011 PDF 277 KB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN6051 02.1 4/17/2008 PDF 67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN6076 01.0 12/12/2007 PDF 215.9 KB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN6082 01.1 4/21/2011 PDF 1.1 MB
Simulating Power Supply Sequences for Power Manager Devices Using PAC-Designer LogiBuilder
AN6044 1.1 4/17/2008 PDF 409.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN6068 01.1 2/28/2011 PDF 245.8 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN6073 01.1 4/21/2011 PDF 171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN6078 01.1 4/21/2011 PDF 1.3 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN6069 01.0 11/21/2005 PDF 259.4 KB
Scalable Centralized Power Management Source Files
DT6089 1.2 6/6/2012 ZIP 520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN6089 01.2 6/6/2012 PDF 1.1 MB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN6077 1.1 10/8/2014 PDF 676.8 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN6075 01.1 4/11/2011 PDF 190.4 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN6070 01.0 11/21/2005 PDF 540.1 KB
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017 PDF 734.6 KB
Using ispVM System to Program ispPAC Devices
AN6062 01.0 5/1/2004 PDF 709.2 KB
Using PAC-Designer's Power Manager Waveform Editor
AN6054 01.0 11/23/2005 PDF 276.3 KB
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN6056 01.1 4/17/2008 PDF 216.1 KB
标题 编号 版本 日期 格式 文件大小
选择全部
ProcessorPM - POWR605 Data Sheet
DS1034 2.0 4/10/2015 PDF 2.7 MB
ispPAC-POWR607 Data Sheet
DS1011 2.0 4/27/2015 PDF 2.7 MB
ispPAC-POWR1220AT8 Data Sheet
FPGA-DS-02051 2.0 4/11/2019 PDF 4.9 MB
LA-ispPAC-POWR1014/A Automotive Family Data Sheet
FPGA-DS-02090 1.4 10/26/2020 PDF 5.6 MB
ispPAC-POWR1014/A Data Sheet
FPGA-DS-02089 2.3 11/20/2020 PDF 4.7 MB
ispPAC-POWR6AT6 Data Sheet
DS1016 1.5 11/13/2013 PDF 3.2 MB
标题 编号 版本 日期 格式 文件大小
选择全部
High-side Current Sensing Techniques for Power Manager Devices
AN6049 01.1 4/17/2008 PDF 70.9 KB
Extending the VMON Input Range of Power/Platform Management Devices
FPGA-AN-02031 2.5 9/21/2021 PDF 1.1 MB
Fail-Safe Sequencing During Field Upgrades Source Files
DT6088 1.2 6/6/2012 ZIP 591.5 KB
Fail-Safe Sequencing During Field Upgrades with Platform Manager
AN6088 01.2 6/6/2012 PDF 1.1 MB
ispPAC-POWR1220AT8 Evaluation Board
AN6065 01.2 3/1/2007 PDF 305.3 KB
Interfacing the Trim Output of Power Manager II Devices to DC-DC Converters
AN6074 1.2 4/7/2015 PDF 3.1 MB
ispPAC-POWR1220AT8 I2C Hardware Verification Utility
AN6067 01.0 11/21/2005 PDF 563.7 KB
Interfacing Power Manager Devices with Modular DC-to-DC Converters
AN6046 01.1 4/17/2008 PDF 494.6 KB
Implementing Power Supply Sequencers with Power/Platform Management Devices and PAC-Designer LogiBuilder
AN6042 01.2 10/7/2011 PDF 277 KB
Monitoring and Controlling Negative Power Supplies with Power Manager Devices
AN6051 02.1 4/17/2008 PDF 67.9 KB
Optimizing the Accuracy of ispPAC Power Manager Timers
AN6076 01.0 12/12/2007 PDF 215.9 KB
Powering Up and Programming the ProcessorPM ispPAC-POWR605
AN6082 01.1 4/21/2011 PDF 1.1 MB
Simulating Power Supply Sequences for Power Manager Devices Using PAC-Designer LogiBuilder
AN6044 1.1 4/17/2008 PDF 409.4 KB
Programming the ispPAC-POWR1220AT8 in a JTAG Chain Using the ATDI Pin
AN6068 01.1 2/28/2011 PDF 245.8 KB
Powering Up and Programming the ispPAC-POWR1220AT8
AN6073 01.1 4/21/2011 PDF 171.2 KB
Powering Up and Programming the ispPAC-POWR607
AN6078 01.1 4/21/2011 PDF 1.3 MB
Programmable Comparator Options for ispPAC-POWR1220AT8
AN6069 01.0 11/21/2005 PDF 259.4 KB
Scalable Centralized Power Management Source Files
DT6089 1.2 6/6/2012 ZIP 520.7 KB
Scalable Centralized Power Management with Field Upgrade Support
AN6089 01.2 6/6/2012 PDF 1.1 MB
Stable Operation of DC-DC Converters with Power Manager Closed Loop Trim
AN6077 1.1 10/8/2014 PDF 676.8 KB
Powering Up and Programming the ispPAC-POWR1014/A
AN6075 01.1 4/11/2011 PDF 190.4 KB
Using the HVOUT Simulator Utility to Estimate FET Ramp Times
AN6070 01.0 11/21/2005 PDF 540.1 KB
Using Power MOSFETs with Power/Platform Management Devices
AN6048 1.3 8/29/2017 PDF 734.6 KB
Using ispVM System to Program ispPAC Devices
AN6062 01.0 5/1/2004 PDF 709.2 KB
Using PAC-Designer's Power Manager Waveform Editor
AN6054 01.0 11/23/2005 PDF 276.3 KB
Using the ABEL Tools of PAC-Designer with Power Manager Devices
AN6052 02.0 5/1/2003 PDF 777 KB
Controlling and Monitoring Power-One Bricks and SIPs with Lattice Power Manager Devices
AN6056 01.1 4/17/2008 PDF 216.1 KB
标题 编号 版本 日期 格式 文件大小
选择全部
ispPAC-POWR607 Evaluation Board User's Guide
Describes the features and functions of the ispPAC-POWR607 Evaluation Board 		5/23/2007 PDF 1.2 MB
标题 编号 版本 日期 格式 文件大小
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Voltage Monitoring for Fault Logging - Documentation
RD1072 1.0 4/26/2010 PDF 447.5 KB
Voltage Monitoring for Fault Logging - Source Code
RD1072 1.0 4/26/2010 ZIP 327.3 KB
Supervisor, WDT and Reset Generation with ProcessorPM - Source Code
RD1056 1.0 8/3/2009 ZIP 744.4 KB
Supervisor, WDT and Reset Generation with ProcessorPM - Documentation
RD1056 1.0 8/17/2009 PDF 815.7 KB
Redundant Power Supply Management
RD1064 1.0 4/26/2010 PDF 508.9 KB
Redundant Power Supply Management - Source Code
RD1064 1.0 4/26/2010 ZIP 441.3 KB
OrCAD Capture (.dsn) format schematics
1 9/28/2010 ZIP 0.7 KB
12V Hot Swap Control - Documentation
RD1068 1.0 4/26/2010 PDF 469.8 KB
AMC Module Power Management - Documentation
RD1070 1.0 4/26/2010 PDF 532.3 KB
AMC Module Power Management - Source Code
RD1070 1.0 4/26/2010 ZIP 468.3 KB
5V and 3.3V Hot Swap Controller - Source Code
RD1057 1.0 8/6/2009 ZIP 135 KB
12V Hot Swap Control - Source Code
RD1068 1.0 4/26/2010 ZIP 371.1 KB
5V and 3.3V Hot Swap Controller - Documentation
RD1057 1.0 8/4/2009 PDF 185.3 KB
Hercules Development Kit Demonstration Source Code
1.0 6/11/2010 ZIP 201.6 KB
标题 编号 版本 日期 格式 文件大小
选择全部
PCN07B-19 Unisem Shutdown
PCN07B-19 11/26/2019 PDF 348.2 KB
PCN06C-11 Withdrawal of PCN06B-11
Material Set 		PCN06C-11 1.0 8/1/2011 PDF 838.5 KB
ACN03D-11 Withdrawal of ACN03C-11
Material Set 		ANC03D-11 1 4/1/2011 PDF 796.6 KB
PCN13A-10 Notification of intent to discontinue select mature devices
PCN13A-10 1 9/7/2010 PDF 163.7 KB
PCN13A-10 Notification of intent to discontinue select mature devices - Japanese Language
PCN13A-10 1 9/7/2010 PDF 205.1 KB
标题 编号 版本 日期 格式 文件大小
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Lattice OrCAD Capture Schematic Library (OLB)
This file contains an OrCAD Capture Schematic Library (OLB file type) for all Lattice products. This .zip file also includes a .xls worksheet with a list of the contents of the OLB. These symbols can be used to help with OrCAD schematic designs. 		FPGA-SC-02005 7.6 4/27/2023 ZIP 4.5 MB
标题 编号 版本 日期 格式 文件大小
选择全部
Automotive Solutions Product Brief (Chinese)
I0164hc 8.0 8/7/2013 PDF 2.5 MB
Power Failure Protection for Solid State Drives
Illustrates several power management improvements for SSD that improve reliablity while lowering system costs. 		I0227 1.0 6/7/2012 PDF 864.3 KB
ProcessorPM Development Kit Product Brief
I0202 1.0 5/22/2013 PDF 673.4 KB
ProcessorPM - POWR605 Product Brochure
I0201 1.0 4/24/2009 PDF 1.6 MB
Power Manager II Product Brief (Chinese)
I0178C 6.0 11/13/2012 PDF 2.1 MB
Power Manager II Product Brief
I0178 7.0 8/14/2013 PDF 1.7 MB
Power Manager II and ispClock Application Examples
I0191 2.0 8/1/2007 PDF 456.1 KB
标题 编号 版本 日期 格式 文件大小
选择全部
TN_VN100_4k_M4A_PAC
Rev B1 10/13/2021 PDF 124.1 KB
SN_SG32
Rev H 4/25/2023 PDF 183.1 KB
TN_VN48 (PAC, M4A)
Rev B 2/7/2018 PDF 25.3 KB
SN24_PAC
Rev F 2/7/2018 PDF 22.1 KB
32 QFNS Pb-Free Device Material Content
Includes all 3 versions 		D 4/19/2016 PDF 43.4 KB
Lattice ispPAC-POWR Product Family Qualification Summary
J 1/22/2021 PDF 493 KB
标题 编号 版本 日期 格式 文件大小
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PAC-Designer Tutorial: Designing Power Manager II
This tutorial shows you how to use several processes, tools, and reports of the PAC-Designer software suite to program digital and analog elements of the ispPAC®-POWR1220AT8 device. 		PDT01 01.1 8/15/2008 PDF 1.3 MB
标题 编号 版本 日期 格式 文件大小
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分布式PLD解决方案可降低服务器成本并提升灵活性
WP009 1.0 8/1/2017 PDF 789.2 KB
Complex Power Management: An Imperative for Modern System Design
11/1/2005 PDF 220.6 KB
Dynamic Power Management in an Embedded System
4/1/2005 PDF 619.6 KB
Load Switching Helps Implement Hot Swaping
1.0 3/1/2010 PDF 215.9 KB
Managing Power Sequencing for the LatticeSC FPGA
2/1/2007 PDF 312.9 KB
Reset Generation for TI DSP Processor (Chinese Language)
1.0 6/28/2010 PDF 226.5 KB
Transforming Circuit Board Design (Chinese Language)
1.0 9/26/2011 PDF 449.1 KB
Reset Generation for TI DSP Processor (Traditional Chinese Language)
1.0 6/28/2010 PDF 286 KB
Power Management for Computer Peripherals - White Paper (Chinese Language Version)
1.0 5/31/2012 PDF 262.8 KB
Reset Generation for TI DSP Processor
1.0 3/1/2010 PDF 64.9 KB
Reset Generation for TI DSP Processor (Japanese Language)
1.0 3/1/2010 PDF 156.6 KB
Transforming Circuit Board Design
1.0 9/26/2011 PDF 424.3 KB
Reset Generation for TI DSP Processor (Korean Language)
1/1/0001 PDF 321.1 KB
标题 编号 版本 日期 格式 文件大小
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[BSDL] ispPAC-POWR607 24-pin QFN
1.0 8/1/2014 BSM 7.4 KB
[BSDL] ispPAC-POWR1014 48-pin TQFP
1.00 4/11/2006 BSM 8.2 KB
[BSDL] ispPAC-POWR605 24-pin QFNS
1.0 4/27/2009 BSM 8.1 KB
[BSDL] ispPAC-POWR1014A 48-pin TQFP
1.00 4/1/2006 BSM 7.8 KB
[BSDL] ispPAC-POWR6AT6 32-pin QFN
1.0 2/1/2007 BSM 7.9 KB
[BSDL] ispPAC-POWR607 32-pin QFN
1.0 2/1/2007 BSM 7.5 KB
[BSDL] ispPAC-POWR1220AT8 100-pin TQFP
1.02 5/24/2006 BSM 12.9 KB
标题 编号 版本 日期 格式 文件大小
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[IBIS] ispPAC-POWR605
0.1 7/1/2009 IBS 174.8 KB
[IBIS] ispPAC-POWR1014/1014A
0.1 2/1/2007 IBS 276.6 KB
[IBIS] ispPAC-POWR607
0.1 2/1/2007 IBS 224.6 KB
[IBIS] ispPAC-POWR1220AT8
0.2 3/2/2012 IBS 412.3 KB
[IBIS] ispPAC-POWR6AT6
0.1 2/1/2007 IBS 145.2 KB
标题 编号 版本 日期 格式 文件大小
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POWR1014A Breakout Board Demo Source
This demo includes the PAC-Designer project source for the preprogrammed demonstration design. It programs the POWR1014A with power supply enable sequence logic and a counter circuit using the embedded timer & open-drain digital pins configured for LED 		1.0 3/21/2011 ZIP 7.4 KB
标题 编号 版本 日期 格式 文件大小
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Selecting Power and Platform Manager Devices Excel Spreadsheet Tool
1.1 3/19/2012 ZIP 63.1 KB

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