10 Gb Ethernet MAC & PCS Reference Design

10 Gb Ethernet MAC & PCS with Data Generator and Checker

The Lattice Semiconductor 10 Gb Ethernet MAC IP Core supports the ability to transmit and receive data between a host processor and an Ethernet network. The main function of the 10 Gb Ethernet MAC is to ensure that the Media Access rules specified in the IEEE 802.3 standards are met while transmitting a frame of data over Ethernet. On the receive side, the Ethernet MAC extracts the different components of a frame and transfers them to higher applications through an AXI4-stream interface.

The 10 Gb Ethernet PCS IP Core provides XGMII interface to MAC and follows IEEE 802.3 10G Base-R standard. It supports 64-bit of data and 8-bit of control signals for both transmit and receive path.

This reference design demonstrates an example of 10G Base-R application using a 10 Gb Ethernet MAC IP Core with a 10 Gb Ethernet PCS IP Core in loopback mode. A simple ethernet packet generator is included to generate ethernet packets to be transmitted on Tx and compare them with received packets from Rx.

Features

  • 10 Gb Ethernet MAC complying to IEEE 802.3
  • 10 Gb Ethernet PCS complying to IEEE 802.3 10G Base-R standard
  • Ethernet packet generator to generate and compare packets
  • Supports internal loopback (Near PMA Loopback) and external loopback mode
  • Supports CertusPro-NX FPGA

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Block Diagram

10 Gb Ethernet MAC & PCS Reference Design Block Diagram

Performance and Resource Utilization

Device Family Language Speed Grade Utilization (LUTS) fMAX (MHz) I/O Architecture Resources
CertusPro-NX1 Verilog -8 4690 >156.25 22 1 PLL, 1 PCS

1. Performance and utilization characteristics are generated using LFCPNX-100-8LFG672C, with Lattice Radiant® 3.1 design software with LSE (Lattice Synthesis Engine).
Note: The Maximum Clock Frequency is obtained by running the timing analysis with the Lattice design software. Timing simulation should be run after any changes are made and the reference design is merged with the overall design.

Documentation

Technical Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
Select All
10Gb Ethernet MAC & PCS Reference Design – User Guide
FPGA-RD-02248 1.1 7/18/2023 PDF 1.1 MB
10Gb Ethernet MAC & PCS Reference Design – Source Code
8/20/2022 ZIP 2.8 MB

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