1 Input to 1 Output MIPI DSI Display Interface Bridge

Important: For new designs, Lattice recommends using the following modular IP blocks to implement this function:

The following Reference Design provides an integration example using these modular IP blocks

Mobile processors and displays are being used for new and exciting applications. A MIPI DSI to MIPI DSI passthrough design is sometimes required to provide an updated MIPI DCS configuration to a new type of display, for scaling or cropping to a new resolution, or as a redriver for systems that need to extend the distance between the processor and the display.

Another example is that mobile processors and displays are being used much further apart from each other in some systems and a MIPI DSI to MIPI DSI redriver is required as a result.

Lattice CrossLink is a programmable video interface bridging device capable of providing multiple MIPI DSI interfaces at up to 6 Gbps per PHY. This bridge is available as free IP is available in Lattice Diamond for allowing easy configuration and setup.


  • Supports MIPI DSI up to 6 Gbps per MIPI D-PHY
    • 1, 2 or 4 Data Lanes
  • Provides one or two MIPI DSI outputs
    • MIPI DSI data replicated to each output port
  • Supports all MIPI DSI data types
    • RGB, YCbCr, User Defined
  • Provides a DCS (Display Command Set) controller to program the display, ROM data used only for DSI in HS or LPDT mode – ROM is programmable by user
  • Compliance with MIPI D-PHY Specification v1.1
  • Compliance with DSI Specification v1.1

Block Diagram

MIPI DSI Display Splitter Bridge Block Diagram


Quick Reference
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1:2 and 1:1 MIPI DSI Display Interface Bridge Soft IP User Guide
FPGA-IPUG-02001 1.4 5/10/2019 PDF 2.4 MB

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