Description:
The I2C Master IP from Lattice does not support repeated start to allow a read then write or a write then read command.
Solution:
A workaround for this is to perform separate start-stop transactions, refer to FPGA-IPUG-02071 section 2.5.
On the other hand, Lattice has a generic Soft I2C Master IP that also supported in CrossLink-NX.
This can be used as an alternative for I2C Master IP core since it has a repeated start feature.