Article Details

ID: 1412
Case Type: faq
Category: Architecture
Related To: Memory EBR/Distributed
Family: MachXO2

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MachXO2: Can I implement Error Check Codes in the Embedded Block Ram (EBR) based memory modules?

IPexpress allows you to implement Error Check Codes (ECC) in the Embedded Block Ram (EBR) based memory modules. There is a checkbox to enable ECC in the configuration tab for the module. If you choose to use ECC, you will have a 2-bit error signal and the error codes are defined below:



  • Error[1:0]="00"- Indicates there is no error.
  • Error[1:0]="01"- Indicates there was a 1-bit error which was fixed.
  • Error[1:0]="10"- Indicates there was a 2-bit error which cannot be corrected.
  • Error[1:0]="11"- Not used.