DisplayPort & Video Scaler Reference Design

Implements DisplayPort Connectivity Including Video Upscaling

The Lattice Drive™ DisplayPort & Video Scaler Reference Design is based on CertusPro-NX. The video source is providing a 720p with 60 frames per second (fps) video stream to the Lattice DisplayPort RX IP (DP RX). Then the video signal is upscaled by the Lattice Video Scaler IP using bicubic algorithm to a 1080p with 60 fps video. Lastly, this video signal is sent through the Lattice DisplayPort TX IP (DP TX) to a video sink. Additionally, the reference design comes with a simulation environment.

The testbench for the reference design has an AXI stream data generator and DP TX IP model to supply the stimulus for the Reference Design (RD). The testbench also an instance of DP RX IP model to receive the DP output from the RD and a AXI stream data checker that compares the output with the AXI stream generator’s input. The reference design and test environment may be modified for a different configuration by replacing the DP and Video Scaler IPs with the ones consistent with the new configuration.

Lattice and design services partners are also available to provide customization to enable support of other configurations.


  • Supports both Up & Down scaling of Image Resolution
  • The reference design and the test bench are based on Lattice IPs allowing for easy modification to support newer configurations
  • Simulation environment with self-checking testbench using a data generator and checker

Block Diagram


Technical Resources
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DisplayPort and Video Scaler Reference Design - Source Code
12/22/2023 ZIP 221 MB
DisplayPort and Video Scaler Reference Design - User Guide
FPGA-RD-02276 1.2 12/3/2023 PDF 1.1 MB

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