Lattice Sentry I2C Monitor IP Core

Resilient I2C Security IP for Platform Firmware Resiliency

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The Lattice Semiconductor Sentry™ I2C Monitor IP for MachXO3D™ and MachXO4™ monitors the traffic on the I2C bus to identify potential illegal traffic based on a pre-defined library. Once illegal traffic is detected, this IP informs the host through the status flag and/or interrupt. With user option, the current communication is disrupted by disabling the I2C bus.

Latest Resource Utilization details are available in the IP Core User Guide.

Features

  • Monitoring of traffic on an I2C bus for illegal activity based on programmable filter conditions
  • Support for AMBA 3 APB Protocol v1.0 for CPU access
  • Configurable using Lattice Propel. No FPGA design or modification necessary
  • Controllable by modifying included reference C source code, which runs on interal RISC-V CPU
  • Pin location and pin-out can be selected visually using Lattice Propel to optimize board design; no RTL programming necessary
Lattice Sentry

Block Diagram

I2C Monitor Block Diagram

Ordering Information

The Lattice Semiconductor Sentry™ I2C Monitor IP for MachXO3D™ and MachXO4™ monitors the traffic on the I2C bus to identify potential illegal traffic based on a pre-defined library. Once illegal traffic is detected, this IP informs the host through the status flag and/or interrupt. With user option, the current communication is disrupted by disabling the I2C bus.

Latest Resource Utilization details are available in the IP Core User Guide.

Documentation

Quick Reference
Information Resources
TITLE NUMBER VERSION DATE FORMAT SIZE
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Lattice Sentry I2C Monitor IP Core - User Guide
FPGA-IPUG-02108 1.1 12/11/2025 PDF 624.6 KB
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Lattice Sentry I2C Monitor IP Release Notes
FPGA-RN-02082 1.0 12/11/2025 PDF 239.1 KB

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