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ID: 6254
Case Type: faq
Category: Other
Related To: Other
Family: CertusPro-NX

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PCIe for All Nexus: How to use and implement the external reference clock (SD_EXTy_REFCLKn) of the PCIe core IP on Radiant Software?

Description: 

Example Implementation:


Notes:
(1) sd_ext_0_refclk is a wire/net signal.
(2) Assign the CLKOUT0/1 to refclkp_i only. The software will automatically assign the differential pin pair, refclkn_i, after Place and Route.
(3) There is no need to assign the pin of the external reference clock to the Device Constraint Editor or through the Constraint File (PDC).
The user-defined refclkp/n ports are successfully assigned to SD_EXTy_REFCLKP/N pins, as shown below.