One of the designing strategies for Platform Manager is using PAC-Designer software for the mixed-signal portion and Lattice Diamond software for the digital portion of the design. This can be selected by choosing "PAC-Designer and Diamond" available in "FPGA Environment..." setting.
In Lattice Diamond software above version 1.2 the directory structure is changed to save project files and implementation files in different folders. Due to this directory structure the error "Unable to locate valid JED File" can be generated when compiling in PAC-Designer.
While using "PAC-Designer and Diamond" design strategy for Platform Manager designs, "Project Name" and "Project Directory" specified should reflect JED file name which includes both the implementation name appended to project name and Path to implementation directory respectively. For example, if implementation name is "impl1" and project name is "Ptm_Project" files corresponding to this implementation are stored in the "Ptm_Project_impl1" folder in the project directory. All file names would also bear this name, for example, the JED file would be "Ptm_Project_impl1.JED". While setting the FPGA environment in PAC-Designer refer "Project Directory" to the implementation folder and "Project Name" with the implementation extension. In the above example, the project name would be "Ptm_Project_impl1" and the project path would refer to this folder in project directory.