Distributed Sensor Processing & Buffering

Connecting, bridging, managing, buffering and processing sensors with low power, small size FPGAs.


iCE40 UltraPlus White paper: "The Industry Case for Distributed Heterogeneous Processing"

I/O Rich FPGAs - Lattice FPGAs offer multiple I/O banks, each capable of supporting independent voltage standards. Implement your bus expansion needs by using Lattice FPGA’s flexible I/Os.

Always-On Sensor Management - Enable that “Always-on” feature that you have been dreaming about by using Lattice’s low power, low cost FPGAs.

Distributed Heterogeneous Processing – With flexible I/Os, these small FPGAs can be placed around PCBs to enable direct connectivity to various sensors. Along with integrated DSPs, the same FPGAs can also provide sensor processing. Finally with additional integrated memory, the captured data can also be buffered prior to being sent to application processors. Together, these three blocks (flexible I/Os, integrated processing, and integrated memory) enable an optimized distributed heterogeneous processing (DHP) solution.

Jump to

Block Diagram

Always-On Sensor Management

  • Localized processing or pre-processing next to sensors for quick responsiveness
  • Improve layout by routing only a single interface to application processor by combining multiple sensors

I/O Hub

  • I/O rich FPGAs with support for various standards such as, but not limited to, I2C, SPI, UART, etc
  • Signal Aggregation to improve layout constraints caused by multiple signals
  • Flexible I/Os are able to be adjusted based on layout needs

Pedometer

  • Pedometer: Is your pedometer not power efficient? Lattice FPGAs enables your system to constantly monitor sensor activity while consuming very low power. Realize your Pedometer solution using Lattice FPGAs.
  • Context Awareness: Low power, low cost Lattice FPGAs can be used to create next generation context aware features in your device today.

Sensor Hub

  • Is the proliferation of sensors causing a I2C bus contention problem? Lattice FPGAs allow you to create dedicated I2C ports for those high bandwidth critical sensors.
  • Interface to the Application Processor using a lower power, higher bandwidth SPI interface
  • Poll sensors in low power while the Application Processor is in sleep mode. Enable customizable buffers, polling schemes based on your specific needs.

Documentation

Information Resources
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Common Analog Functions Using an iCE40 FPGA
SB01210/17/2012PDF397.1 KB
Consumer Solutions Brochure
I02226.010/24/2013PDF4.6 MB
Enabling 3D Active Shutter Glasses
SB00710/18/2012PDF406.5 KB
Enabling Dual Displays in Digital Still Cameras
SB01010/19/2012PDF381.5 KB
Enabling Dual SIM Phones
SB00610/17/2012PDF448 KB
Enabling Low-Cost Displays for Digital Still Cameras
SB01410/18/2012PDF645.4 KB
Enabling the Nokia ECI for Smartphones
SB01510/18/2012PDF336.2 KB
Enabling Wi-Fi Connectivity in Feature Phones
SB01110/18/2012PDF369.1 KB
Intelligent Sensor Management
SB00310/17/2012PDF509.4 KB
Low-Cost Docking Stations for Mobile Devices
SB00910/19/2012PDF767.1 KB
MIPI Battery Interface Using iCE40
I02244.010/26/2017PDF722.1 KB
Radio Expansion in Portable Navigation Devices
SB00510/18/2012PDF979.6 KB
Sensor Expansion for Qualcomm MSM/QSD
SB00110/18/2012PDF339.2 KB
Sensor Expansion in Mobile Handsets
SB00210/18/2012PDF437.7 KB
Sensor Mangement via MIPI SLIMbus
SB01310/17/2012PDF520.9 KB
Video Scaling and Expansion in Media Tablets
SB00410/18/2012PDF749.6 KB

*By clicking on the "Notify Me of Changes" button, you agree to receive notifications on changes to the document(s) you selected.

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An FPGA Companion in Smartphone Design
1.05/1/2012PDF550.2 KB
New Approaches to Hardware Acceleration Using Ultra Low Density FPGAs
1.08/25/2013PDF397 KB
Programmable Logic Devices in Handsets (Chinese Language Version)
1.05/31/2012PDF198.4 KB
Programmable Logic Devices in Mobile Handsets
1.06/1/2012PDF154.4 KB
The Industry Case for Distributed Heterogeneous Processing
WP00081.012/12/2016PDF641.9 KB
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iCE40 Ultra Wearables Infographic
1.012/31/2015PNG459.9 KB

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