In mission critical systems such as data center, storage or networking equipment, feature improvements and bug fixes are performed through background updates. However, up to now, designers have been avoiding updating of the control Programmable Logic Device (which typically performs functions such as power management, reset management, glue logic and other housekeeping functions on the board) as it forced a power cycle or reset of the entire system to enable the new algorithm to take effect.
The Lattice Semiconductor MachXO3™ device, the most popular control PLD, can be updated in the background and the new algorithm takes effect without interrupting board-level operations. There is no need for a power-cycle or reset of the device or the system. This feature is known as the hitless or zero-downtime system update.
Transparent Background Programming – Update MachXO3LF configuration Flash memory with zero downtime and no interruption to the active configuration.
Hitless I/O During Reconfiguration – New program refresh without power cycling and glitches to the active configuration.
Reliability with Dual Boot Support – Automatic recovery to golden failsafe image protects system during reprogramming.